util/gen_spd: translate DeviceBusWidth to die bus width
If a memory part is a x16 part that has two dies and only a single rank, then the x16 describes the part width (since this solution will need to be a stacked solution) and as such, we must translate the DeviceBusWidth to the "die bus width" instead. Change DeviceBusWidth variable name to PackageBusWidth to be more descriptive BUG=b:166645306, b:160157545 TEST=run gen_spd and verify that spds for parts matching description above changed appropriately. Change-Id: Ia6f3ca109d344b7a015da28125a94ce10d2bdfb8 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44870 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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committed by
Aaron Durbin
parent
2afee12991
commit
913ea9278f
@ -59,7 +59,7 @@ Input JSON file requires the following two fields for every memory part:
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* `diesPerPackage`: Number of dies on the part. Valid values:
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`1, 2` dies per package.
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* `deviceBusWidth`: Number of bits of the device's address bus. Valid values:
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* `packageBusWidth`: Number of bits of the device's address bus. Valid values:
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`8, 16` bit-wide bus. NOTE: Width of x4 is not supported by this tool.
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* `ranksPerPackage`: From Jedec doc 4_01_02_AnnexL-1R23:
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@ -145,7 +145,7 @@ string like "9 10 11 12 14".
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"CL_nRCD_nRP": 22
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"capacityPerDieGb": 8,
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"diesPerPackage": 2,
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"deviceBusWidth": 16,
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"packageBusWidth": 16,
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"ranksPerPackage": 1,
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}
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},
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@ -156,7 +156,7 @@ string like "9 10 11 12 14".
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"CL_nRCD_nRP": 22
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"capacityPerDieGb": 8,
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"diesPerPackage": 1,
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"deviceBusWidth": 16,
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"packageBusWidth": 16,
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"ranksPerPackage": 2,
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"casLatencies": "9 10 11 12 13 14 15 16 17 18 19 20",
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"tCKMaxPs": "1250"
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