soc: Add SPDX license headers to Makefiles

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ic875708697f07b6dae09d27dbd67eb8b960749f0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>

src/soc/intel/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_STITCH_ME_BIN),y)
 
 objcse := $(obj)/cse

src/soc/intel/alderlake/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE),y)
 subdirs-y += romstage
 subdirs-y += ../../../cpu/intel/microcode

src/soc/intel/apollolake/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_APOLLOLAKE),y)
 
 subdirs-y += ../../../cpu/intel/common

src/soc/intel/baytrail/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y)
 
 subdirs-y += romstage

src/soc/intel/baytrail/romstage/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 romstage-y += ../../../../cpu/intel/car/romstage.c
 romstage-y += romstage.c
 romstage-y += raminit.c

src/soc/intel/braswell/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
 
 subdirs-y += romstage

src/soc/intel/braswell/romstage/Makefile.inc

@@ -1,2 +1,3 @@
+## SPDX-License-Identifier: GPL-2.0-only
 romstage-y += ../../../../cpu/intel/car/romstage.c
 romstage-y += romstage.c

src/soc/intel/broadwell/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
 
 subdirs-y += pch

src/soc/intel/broadwell/pch/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-y += bootblock.c
 
 ramstage-y += adsp.c

src/soc/intel/cannonlake/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_BASE),y)
 
 subdirs-y += romstage

src/soc/intel/common/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_COMMON),y)
 
 subdirs-y += basecode/

src/soc/intel/common/basecode/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_COMMON_BASECODE),y)
 
 subdirs-y += ./*

src/soc/intel/common/basecode/debug/Makefile.inc

@@ -1,2 +1,3 @@
+## SPDX-License-Identifier: GPL-2.0-only
 romstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE) += debug_feature.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE) += debug_feature.c

src/soc/intel/common/block/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK),y)
 
 subdirs-y += ./*

src/soc/intel/common/block/acpi/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI) += acpi.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO) += gpio.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT) += lpit.c

src/soc/intel/common/block/chip/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG),y)
 
 bootblock-y += chip.c

src/soc/intel/common/block/cnvi/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CNVI) += cnvi.c

src/soc/intel/common/block/cpu/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_FSP_CAR),y)
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU)+= car/cache_as_ram_fsp.S
 ifeq ($(CONFIG_NO_FSP_TEMP_RAM_EXIT),y)

src/soc/intel/common/block/crashlog/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CRASHLOG) += crashlog.c

src/soc/intel/common/block/cse/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c
 romstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite.c

src/soc/intel/common/block/dsp/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_DSP) += dsp.c

src/soc/intel/common/block/dtt/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_DTT) += dtt.c

src/soc/intel/common/block/fast_spi/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c
 

src/soc/intel/common/block/gpio/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c

src/soc/intel/common/block/gpmr/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR), y)
 
 bootblock-y += gpmr.c

src/soc/intel/common/block/graphics/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS) += graphics.c

src/soc/intel/common/block/gspi/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c

src/soc/intel/common/block/hda/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA) += hda.c

src/soc/intel/common/block/i2c/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_I2C),y)
 
 bootblock-y += i2c.c

src/soc/intel/common/block/ioc/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOC) += ioc.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOC) += ioc.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOC) += ioc.c

src/soc/intel/common/block/ipu/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IPU) += ipu.c

src/soc/intel/common/block/irq/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IRQ) += irq.c

src/soc/intel/common/block/itss/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS) += itss.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS) += itss.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS) += itss.c

src/soc/intel/common/block/lpc/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc_lib.c
 
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc_lib.c

src/soc/intel/common/block/lpss/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c
 verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c

src/soc/intel/common/block/memory/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_MEMINIT) += meminit.c

src/soc/intel/common/block/p2sb/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c

src/soc/intel/common/block/pcie/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 subdirs-y += ./*
 
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE) += pcie_helpers.c

src/soc/intel/common/block/pcie/rtd3/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3) += rtd3.c

src/soc/intel/common/block/pcr/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c

src/soc/intel/common/block/pmc/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_PMC),y)
 bootblock-y += pmclib.c
 romstage-y += pmclib.c

src/soc/intel/common/block/power_limit/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT) += power_limit.c

src/soc/intel/common/block/rtc/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c

src/soc/intel/common/block/sata/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SATA) += sata.c

src/soc/intel/common/block/scs/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifneq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y)
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SCS) += sd.c
 endif

src/soc/intel/common/block/sgx/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) += sgx.c

src/soc/intel/common/block/smbus/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbuslib.c
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbus_early.c
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c

src/soc/intel/common/block/smm/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c
 postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c

src/soc/intel/common/block/spi/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_SPI),y)
 bootblock-y += spi.c
 

src/soc/intel/common/block/sram/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SRAM) += sram.c

src/soc/intel/common/block/systemagent/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent_early.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent_early.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent_early.c

src/soc/intel/common/block/tcss/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS) += tcss.c

src/soc/intel/common/block/thermal/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL) += thermal_common.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV) += thermal_pci.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC) += thermal_pmc.c

src/soc/intel/common/block/timer/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c
 verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c

src/soc/intel/common/block/uart/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c

src/soc/intel/common/block/usb4/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4) += usb4.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE) += pcie.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI) += xhci.c

src/soc/intel/common/block/xdci/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI) += xdci.c

src/soc/intel/common/block/xhci/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI) += xhci.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG) += elog.c
 

src/soc/intel/common/pch/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 subdirs-$(CONFIG_SOC_INTEL_COMMON_PCH_BASE) += ./*
 
 ifeq ($(CONFIG_SOC_INTEL_COMMON_PCH_BASE),y)

src/soc/intel/common/pch/lockdown/Makefile.inc

@@ -1 +1,2 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-$(CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN) += lockdown.c

src/soc/intel/elkhartlake/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_ELKHARTLAKE),y)
 
 subdirs-y += romstage

src/soc/intel/icelake/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_ICELAKE),y)
 
 subdirs-y += romstage

src/soc/intel/jasperlake/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_JASPERLAKE),y)
 
 subdirs-y += romstage

src/soc/intel/meteorlake/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_METEORLAKE),y)
 
 subdirs-y += romstage

src/soc/intel/skylake/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE),y)
 
 subdirs-y += nhlt

src/soc/intel/skylake/nhlt/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ramstage-y += dmic.c
 ramstage-y += nau88l25.c
 ramstage-y += max98357.c

src/soc/intel/skylake/romstage/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 romstage-y += fsp_params.c
 romstage-y += ../../../../cpu/intel/car/romstage.c
 romstage-y += romstage.c

src/soc/intel/tigerlake/Makefile.inc

@@ -1,3 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_INTEL_TIGERLAKE),y)
 
 subdirs-y += romstage