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mb/system76: ADL: Add gfx register for GMA ACPI

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Add gfx register to System76 ADL boards so GMA ACPI data is generated.
Fixes backlight controls on Windows 10 and Linux 6.1.

Change-Id: I356e09350ee0f1412409509a2b1695642ae210b3
Signed-off-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
Tim Crawford
2022-11-01 11:43:56 -06:00
committed by Tim Crawford
parent 3af06b307f
commit 923476d15a
3 changed files with 6 additions and 0 deletions
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2
src/mainboard/system76/adl-p/devicetree.cb
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@@ -32,6 +32,8 @@ chip soc/intel/alderlake
[DDI_PORT_A] = DDI_ENABLE_HPD, [DDI_PORT_A] = DDI_ENABLE_HPD,
[DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, [DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
}" }"
register "gfx" = "GMA_DEFAULT_PANEL(0)"
end end
device ref tbt_pcie_rp0 on end device ref tbt_pcie_rp0 on end
device ref shared_sram on end device ref shared_sram on end

2
src/mainboard/system76/gaze17/variants/3050/overridetree.cb
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@@ -9,6 +9,8 @@ chip soc/intel/alderlake
[DDI_PORT_A] = DDI_ENABLE_HPD, [DDI_PORT_A] = DDI_ENABLE_HPD,
[DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, [DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
}" }"
register "gfx" = "GMA_DEFAULT_PANEL(0)"
end end
device ref pcie4_0 on device ref pcie4_0 on
# PCIe PEG0 x4, Clock 0 (SSD2) # PCIe PEG0 x4, Clock 0 (SSD2)

2
src/mainboard/system76/gaze17/variants/3060/overridetree.cb
View File

@@ -6,6 +6,8 @@ chip soc/intel/alderlake
# DDIA is eDP # DDIA is eDP
register "ddi_portA_config" = "1" register "ddi_portA_config" = "1"
register "ddi_ports_config[DDI_PORT_A]" = "DDI_ENABLE_HPD" register "ddi_ports_config[DDI_PORT_A]" = "DDI_ENABLE_HPD"
register "gfx" = "GMA_DEFAULT_PANEL(0)"
end end
device ref pcie4_0 on device ref pcie4_0 on
# PCIe PEG0 x4, Clock 0 (SSD2) # PCIe PEG0 x4, Clock 0 (SSD2)