soc/amd: Refactor DPTC Tablet Mode
Refactor AMD DPTC tablet mode in preparation for adding low/no battery DPTC settings. 1. Refactor and simplify acpigen_write_alib_dptc() into the following functions: - acpigen_write_alib_dptc_default() - acpigen_write_alib_dptc_tablet() 2. Add device tree register value dptc_tablet_mode_enable to control whether DPTC tablet mode is enabled for a variant. 3. Add dptc.asl to perform the necessary ACPI checking before modifying the DPTC settings. BRANCH=none BUG=b:217911928 TEST=Build zork TEST=Build nipperkin TEST=Boot skyrim Change-Id: I2518fdd526868c9d5668a6018fd3570392e809c0 Signed-off-by: Tim Van Patten <timvp@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66994 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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committed by
Felix Held
parent
14bed61ba1
commit
9244358536
@ -184,21 +184,24 @@ static void acipgen_dptci(void)
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{
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const struct soc_amd_picasso_config *config = config_of_soc();
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if (!config->dptc_enable)
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if (!config->dptc_tablet_mode_enable)
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return;
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/* DPTC is enabled. Always fill out the default DPTC values. */
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struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit_degreeC,
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config->sustained_power_limit_mW,
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config->fast_ppt_limit_mW,
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config->slow_ppt_limit_mW);
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acpigen_write_alib_dptc_default((uint8_t *)&default_input, sizeof(default_input));
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/* Tablet Mode */
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struct dptc_input tablet_mode_input = DPTC_INPUTS(
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config->thermctl_limit_tablet_mode_degreeC,
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config->sustained_power_limit_tablet_mode_mW,
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config->fast_ppt_limit_tablet_mode_mW,
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config->slow_ppt_limit_tablet_mode_mW);
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acpigen_write_alib_dptc((uint8_t *)&default_input, sizeof(default_input),
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(uint8_t *)&tablet_mode_input, sizeof(tablet_mode_input));
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acpigen_write_alib_dptc_tablet((uint8_t *)&tablet_mode_input,
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sizeof(tablet_mode_input));
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}
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static void root_complex_fill_ssdt(const struct device *device)
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