arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class

Build of the entire smm-class is skipped if we have
HAVE_SMI_HANDLER=n.

Change-Id: I10b4300ddd18b1673c404b45fd9642488ab3186c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34125
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Lance Zhao <lance.zhao@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/cpu/amd/agesa/family15tn/Makefile.inc

@@ -19,7 +19,7 @@ ramstage-y += fixme.c
 ramstage-y += chip_name.c
 ramstage-y += model_15_init.c
 
-smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
+smm-y += udelay.c
 
 subdirs-y += ../../mtrr
 subdirs-y += ../../smm

src/cpu/amd/pi/00630F01/Makefile.inc

@@ -19,7 +19,7 @@ ramstage-y += fixme.c
 ramstage-y += chip_name.c
 ramstage-y += model_15_init.c
 
-smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
+smm-y += udelay.c
 
 subdirs-y += ../../mtrr
 subdirs-y += ../../smm

src/cpu/intel/common/Makefile.inc

@@ -2,4 +2,4 @@ ramstage-y += common_init.c
 romstage-$(CONFIG_UDELAY_LAPIC) += fsb.c
 ramstage-$(CONFIG_UDELAY_LAPIC) += fsb.c
 postcar-$(CONFIG_UDELAY_LAPIC) += fsb.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += fsb.c
+smm-y += fsb.c

src/cpu/intel/haswell/Makefile.inc

@@ -13,8 +13,8 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c
 romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
 postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
 
-smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
+smm-y += finalize.c
+smm-y += tsc_freq.c
 
 ifneq ($(CONFIG_TSC_MONOTONIC_TIMER),y)
 bootblock-y += monotonic_timer.c

src/cpu/intel/model_2065x/Makefile.inc

@@ -13,11 +13,11 @@ subdirs-y += ../common
 ramstage-y += tsc_freq.c
 romstage-y += tsc_freq.c
 postcar-y += tsc_freq.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
+smm-y += tsc_freq.c
 
 ramstage-y += acpi.c
 
-smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
+smm-y += finalize.c
 
 romstage-y += stage_cache.c
 ramstage-y += stage_cache.c

src/cpu/intel/model_206ax/Makefile.inc

@@ -15,14 +15,14 @@ ramstage-y += acpi.c
 
 ramstage-y += common.c
 romstage-y += common.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += common.c
+smm-y += common.c
 
 ramstage-y += tsc_freq.c
 romstage-y += tsc_freq.c
 postcar-y += tsc_freq.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
+smm-y += tsc_freq.c
 
-smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
+smm-y += finalize.c
 
 romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
 postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c

src/cpu/x86/smm/Makefile.inc

@@ -36,13 +36,16 @@ $(call src-to-obj,ramstage,$(obj)/cpu/x86/smm/smm.manual): $(obj)/smm/smm
 	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
 	cd $(dir $<); $(OBJCOPY_smm) -I binary $(notdir $<) $(target-objcopy) $(abspath $@)
 
+ifeq ($(CONFIG_HAVE_SMI_HANDLER),y)
+ramstage-srcs += $(obj)/cpu/x86/smm/smm.manual
+endif
+
 ifeq ($(CONFIG_SMM_TSEG),y)
 
 smmstub-y += smm_stub.S
 
 smm-y += smm_module_handler.c
 
-ramstage-srcs += $(obj)/cpu/x86/smm/smm.manual
 ramstage-srcs += $(obj)/cpu/x86/smm/smmstub.manual
 
 # SMM Stub Module. The stub is used as a trampoline for relocation and normal
@@ -82,10 +85,6 @@ $(obj)/smm/smm: $(obj)/smm/smm.o $(src)/cpu/x86/smm/smm.ld
 	$(NM_smm) -n $(obj)/smm/smm.elf | sort > $(obj)/smm/smm.map
 	$(OBJCOPY_smm) -O binary $(obj)/smm/smm.elf $@
 
-ifeq ($(CONFIG_HAVE_SMI_HANDLER),y)
-ramstage-srcs += $(obj)/cpu/x86/smm/smm.manual
-endif
-
 smm-y += smmhandler.S
 smm-y += smihandler.c
 

src/cpu/x86/tsc/Makefile.inc

@@ -3,6 +3,4 @@ ramstage-$(CONFIG_UDELAY_TSC) += delay_tsc.c
 romstage-$(CONFIG_TSC_CONSTANT_RATE) += delay_tsc.c
 verstage-$(CONFIG_TSC_CONSTANT_RATE) += delay_tsc.c
 postcar-$(CONFIG_TSC_CONSTANT_RATE) += delay_tsc.c
-ifeq ($(CONFIG_HAVE_SMI_HANDLER),y)
 smm-$(CONFIG_TSC_CONSTANT_RATE) += delay_tsc.c
-endif