drivers/intel/fsp1_1: align on using ACPI_Sx definitions

The SLEEP_STATE_x definitions in the chipsets utilizing
FSP 1.1. driver have the exact same values as the ACPI_Sx
definitions. The chipsets will be moved over subsequently,
but updating this first allows the per-chipset patches
to be isolated.

BUG=chrome-os-partner:54977

Change-Id: I383a9a732ef68bf2276f6149ffa5360bcdfb70b3
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15665
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
This commit is contained in:
Aaron Durbin
2016-07-13 23:09:52 -05:00
parent 9fe0ff2f83
commit 932e09d168
2 changed files with 10 additions and 8 deletions

View File

@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <arch/acpi.h>
#include <cbmem.h>
#include <console/console.h>
#include <fsp/memmap.h>
@ -80,7 +81,7 @@ void raminit(struct romstage_params *params)
/* Zero fill RT Buffer data and start populating fields. */
memset(&fsp_rt_common_buffer, 0, sizeof(fsp_rt_common_buffer));
pei_ptr = params->pei_data;
if (pei_ptr->boot_mode == SLEEP_STATE_S3) {
if (pei_ptr->boot_mode == ACPI_S3) {
fsp_rt_common_buffer.BootMode = BOOT_ON_S3_RESUME;
} else if (pei_ptr->saved_data != NULL) {
fsp_rt_common_buffer.BootMode =
@ -156,7 +157,7 @@ void raminit(struct romstage_params *params)
/* Migrate CAR data */
printk(BIOS_DEBUG, "0x%p: cbmem_top\n", cbmem_top());
if (pei_ptr->boot_mode != SLEEP_STATE_S3) {
if (pei_ptr->boot_mode != ACPI_S3) {
cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
fsp_reserved_bytes);
} else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,