soc/apollolake: Use simpler macros for the northbridge PCI device

The NB_DEV_ROOT macro, is almost unreadable, as it depends on other
stringified macros, and acts differently depending on the coreboot
stage. For ramstage, it also hides a function call.
Rewrite the macro in terms of more basic and readable macros.

Change-Id: I9b7071d67c8d58926e9b01fadaa239db1120448c
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Reviewed-on: https://review.coreboot.org/14890
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/apollolake/chip.c

@@ -100,7 +100,7 @@ void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)
 	/* Load VBT before devicetree-specific config. */
 	silconfig->GraphicsConfigPtr = (uintptr_t)vbt;
 
-	struct device *dev = NB_DEV_ROOT;
+	struct device *dev = dev_find_slot(NB_BUS, NB_DEVFN);
 	if (!dev || !dev->chip_info) {
 		printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
 		return;