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skylake DT/HALO mainboards: Drop SaGv setting

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SaGv is only supported on ULT/ULX hardware.

Change-Id: I25001e97cce3193629e7fa7573bf9b352362d59b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Angel Pons
2021-04-04 16:08:33 +02:00
parent b6796be8e0
commit 94bbf0efc8
3 changed files with 0 additions and 4 deletions
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1
src/mainboard/asrock/h110m/devicetree.cb
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@@ -19,7 +19,6 @@ chip soc/intel/skylake
# FSP Configuration # FSP Configuration
register "PrimaryDisplay" = "Display_PEG" register "PrimaryDisplay" = "Display_PEG"
register "SaGv" = "SaGv_Enabled"
# Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch
# SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s

2
src/mainboard/intel/saddlebrook/devicetree.cb
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@@ -20,8 +20,6 @@ chip soc/intel/skylake
register "ScsEmmcHs400Enabled" = "0" register "ScsEmmcHs400Enabled" = "0"
register "SkipExtGfxScan" = "1" register "SkipExtGfxScan" = "1"
register "SaGv" = "SaGv_Enabled"
# Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch
# SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s
register "PmConfigSlpS3MinAssert" = "0x02" register "PmConfigSlpS3MinAssert" = "0x02"

1
src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
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@@ -2,7 +2,6 @@ chip soc/intel/skylake
# FSP Configuration # FSP Configuration
register "SkipExtGfxScan" = "1" register "SkipExtGfxScan" = "1"
register "SaGv" = "SaGv_Disabled"
# SATA configuration # SATA configuration
register "SataSalpSupport" = "1" register "SataSalpSupport" = "1"