diff --git a/src/mainboard/system76/galp5/Kconfig b/src/mainboard/system76/galp5/Kconfig index 8758e7f347..81793820de 100644 --- a/src/mainboard/system76/galp5/Kconfig +++ b/src/mainboard/system76/galp5/Kconfig @@ -4,7 +4,6 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 select DRIVERS_I2C_HID - select DRIVERS_INTEL_PMC select DRIVERS_INTEL_USB4_RETIMER select DRIVERS_SYSTEM76_DGPU select EC_SYSTEM76_EC diff --git a/src/mainboard/system76/galp5/devicetree.cb b/src/mainboard/system76/galp5/devicetree.cb index ed2d350ea2..6f71dd17c5 100644 --- a/src/mainboard/system76/galp5/devicetree.cb +++ b/src/mainboard/system76/galp5/devicetree.cb @@ -25,13 +25,13 @@ chip soc/intel/tigerlake // /sys/class/powercap/intel-rapl:0/constraint_0_power_limit_uw .tdp_pl1_override = 28, // /sys/class/powercap/intel-rapl:0/constraint_1_power_limit_uw - .tdp_pl2_override = 60, + .tdp_pl2_override = 51, }" register "power_limits_config[POWER_LIMITS_U_2_CORE]" = "{ // /sys/class/powercap/intel-rapl:0/constraint_0_power_limit_uw .tdp_pl1_override = 28, // /sys/class/powercap/intel-rapl:0/constraint_1_power_limit_uw - .tdp_pl2_override = 60, + .tdp_pl2_override = 51, }" # Finalize (soc/intel/tigerlake/finalize.c) @@ -67,9 +67,6 @@ chip soc/intel/tigerlake .vnn_sx_voltage_mv = 1050, }" - #TODO: Hybrid storage mode - register "HybridStorageMode" = "0" - # Default IOM Port Config register "IomTypeCPortPadCfg[0]" = "0x09000000" register "IomTypeCPortPadCfg[1]" = "0x09000000" @@ -94,7 +91,7 @@ chip soc/intel/tigerlake # Thermal # rdmsr --bitfield 31:24 --decimal 0x1A2 - register "tcc_offset" = "13" + register "tcc_offset" = "12" # PM Util (soc/intel/tigerlake/pmutil.c) # GPE configuration @@ -126,7 +123,6 @@ chip soc/intel/tigerlake register "gfx" = "GMA_STATIC_DISPLAYS(0)" end device ref dptf on - # Enable DPTF device register "Device4Enable" = "1" end device ref peg on @@ -141,6 +137,9 @@ chip soc/intel/tigerlake # register "srcclk_pin" = "-1" # SSD1_CLKREQ# # device generic 0 on end # end + + #TODO: Hybrid storage mode? + register "HybridStorageMode" = "0" end device ref tbt_pcie_rp0 on end # J_TYPEC2 device ref gna on end @@ -148,7 +147,7 @@ chip soc/intel/tigerlake register "TcssXhciEn" = "1" # TODO: usb/acpi end - device ref tbt_dma0 on + device ref tbt_dma0 on # J_TYPEC2 chip drivers/intel/usb4/retimer register "power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A23)" device generic 0 on end @@ -222,7 +221,7 @@ chip soc/intel/tigerlake end end device ref pcie_rp9 on - # PCIe root port #9 x1, Clock 3 (Card Reader) + # PCIe root port #9 x1, Clock 3 (CARD) register "PcieRpEnable[8]" = "1" register "PcieRpLtrEnable[8]" = "1" register "PcieClkSrcUsage[3]" = "8" diff --git a/src/mainboard/system76/lemp10/Kconfig b/src/mainboard/system76/lemp10/Kconfig index 3b0838fa52..bf3d1d5647 100644 --- a/src/mainboard/system76/lemp10/Kconfig +++ b/src/mainboard/system76/lemp10/Kconfig @@ -4,7 +4,6 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 select DRIVERS_I2C_HID - select DRIVERS_INTEL_PMC select DRIVERS_INTEL_USB4_RETIMER select EC_SYSTEM76_EC select EC_SYSTEM76_EC_BAT_THRESHOLDS @@ -40,6 +39,8 @@ config MAINBOARD_VERSION string default "lemp10" +#TODO: subsystem IDs + config CBFS_SIZE hex default 0xA00000 diff --git a/src/mainboard/system76/lemp10/bootblock.c b/src/mainboard/system76/lemp10/bootblock.c index 2b673021b5..b5110fd5f5 100644 --- a/src/mainboard/system76/lemp10/bootblock.c +++ b/src/mainboard/system76/lemp10/bootblock.c @@ -4,7 +4,6 @@ #include #include "gpio.h" -void bootblock_mainboard_init(void) -{ +void bootblock_mainboard_init(void) { gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); } diff --git a/src/mainboard/system76/lemp10/devicetree.cb b/src/mainboard/system76/lemp10/devicetree.cb index 2a87482184..4dfd3592f9 100644 --- a/src/mainboard/system76/lemp10/devicetree.cb +++ b/src/mainboard/system76/lemp10/devicetree.cb @@ -34,51 +34,18 @@ chip soc/intel/tigerlake .tdp_pl2_override = 30, }" -# eSPI (soc/intel/tigerlake/espi.c) - # LPC configuration from lspci -s 1f.0 -xxx - # Address 0x84: Decode 0x80 - 0x8F (Port 80) - register "gen1_dec" = "0x000c0081" - # Address 0x88: Decode 0x68 - 0x6F (PMC) - register "gen2_dec" = "0x00040069" - # Address 0x8C: Decode 0xE00 - 0xEFF (AP/EC command) - register "gen3_dec" = "0x00fc0E01" - # Address 0x90: Decode 0xF00 - 0xFFF (AP/EC debug) - register "gen4_dec" = "0x00fc0F01" - # Finalize (soc/intel/tigerlake/finalize.c) # PM Timer Disabled, saves power register "PmTimerDisabled" = "1" # FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c) - # DDIA is eDP - register "DdiPortAConfig" = "1" - register "DdiPortAHpd" = "1" - register "DdiPortADdc" = "0" - - # DDIB is HDMI - register "DdiPortBConfig" = "0" - register "DdiPortBHpd" = "1" - register "DdiPortBDdc" = "1" - # Enable C6 DRAM register "enable_c6dram" = "1" - # High Definition Audio - register "PchHdaAudioLinkHdaEnable" = "1" - # System Agent dynamic frequency support register "SaGv" = "SaGv_Enabled" - # Enable SMBus - register "SmbusEnable" = "1" - - # TCSS USB3 - register "TcssXhciEn" = "1" - # FSP Silicon (soc/intel/tigerlake/fsp_params.c) - # Enable DPTF device - register "Device4Enable" = "1" - # FIVR configuration # Read EXT_RAIL_CONFIG to determine bitmaps # sudo devmem2 0xfe0011b8 @@ -100,9 +67,6 @@ chip soc/intel/tigerlake .vnn_sx_voltage_mv = 1050, }" - #TODO: Hybrid storage mode - register "HybridStorageMode" = "0" - # Default IOM Port Config register "IomTypeCPortPadCfg[0]" = "0x09000000" register "IomTypeCPortPadCfg[1]" = "0x09000000" @@ -125,106 +89,10 @@ chip soc/intel/tigerlake LPM_S0i3_4 " - # SATA1 (SSD2) - register "SataPortsEnable[1]" = "1" - register "SataPortsDevSlp[1]" = "1" - register "SataPortsEnableDitoConfig[1]" = "1" - register "SataSalpSupport" = "1" - - # I2C channels - register "SerialIoI2cMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoPci, // Touchpad I2C bus - [PchSerialIoIndexI2C1] = PchSerialIoPci, // TODO: USB-PD? - [PchSerialIoIndexI2C2] = PchSerialIoDisabled, - [PchSerialIoIndexI2C3] = PchSerialIoDisabled, - [PchSerialIoIndexI2C4] = PchSerialIoDisabled, - [PchSerialIoIndexI2C5] = PchSerialIoDisabled, - }" - - # SPI channels - register "SerialIoGSpiMode" = "{ - [PchSerialIoIndexGSPI0] = PchSerialIoDisabled, - [PchSerialIoIndexGSPI1] = PchSerialIoDisabled, - [PchSerialIoIndexGSPI2] = PchSerialIoDisabled, - [PchSerialIoIndexGSPI3] = PchSerialIoDisabled, - }" - - #TODO: GSpiCsMode and GSpiCsState ? - - # UART channels - register "SerialIoUartMode" = "{ - [PchSerialIoIndexUART0] = PchSerialIoDisabled, - [PchSerialIoIndexUART1] = PchSerialIoDisabled, - [PchSerialIoIndexUART2] = PchSerialIoDisabled, - }" - - # USB2 - register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # USB Type-A Port 1 TODO - register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # USB Type-A Port 2 TODO - register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB Type-C Port 3 TODO - register "usb2_ports[3]" = "USB2_PORT_EMPTY" - register "usb2_ports[4]" = "USB2_PORT_EMPTY" - register "usb2_ports[5]" = "USB2_PORT_EMPTY" - register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Camera - register "usb2_ports[7]" = "USB2_PORT_EMPTY" - register "usb2_ports[8]" = "USB2_PORT_EMPTY" - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - - # USB3 - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB Type-A Port 1 TODO - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB Type-A Port 2 TODO - register "usb3_ports[2]" = "USB3_PORT_EMPTY" - register "usb3_ports[3]" = "USB3_PORT_EMPTY" - - # PCIe root ports: - # PCIe 4 x4 - SSD1 - # 3 x1 - WiFi - # 6 x1 - CARD - # 9 x4 - SSD2 - - # PCIe clocks: - # 0 - SSD2 - lines mislabeled SSD1 - # 1 - WLAN - # 2 - CARD - # 3 - SSD1 - lines mislabeled SSD2 - - # PCIe PEG0 x4, Clock 3 (SSD1) - register "PcieClkSrcUsage[3]" = "0x40" - register "PcieClkSrcClkReq[3]" = "3" - - # PCIe root port #3 x1, Clock 1 (WLAN) - register "PcieRpEnable[2]" = "1" - register "PcieRpLtrEnable[2]" = "1" - register "PcieClkSrcUsage[1]" = "2" - register "PcieClkSrcClkReq[1]" = "1" - - # PCIe root port #6 x1, Clock 2 (CARD) - register "PcieRpEnable[5]" = "1" - register "PcieRpLtrEnable[5]" = "1" - register "PcieClkSrcUsage[2]" = "5" - register "PcieClkSrcClkReq[2]" = "2" - - # PCIe root port #9 x4, Clock 0 (SSD2) - register "PcieRpEnable[8]" = "1" - register "PcieRpLtrEnable[8]" = "1" - register "PcieClkSrcUsage[0]" = "8" - register "PcieClkSrcClkReq[0]" = "0" - # Thermal # rdmsr --bitfield 31:24 --decimal 0x1A2 register "tcc_offset" = "12" -# Graphics (soc/intel/tigerlake/graphics.c) - register "gfx" = "GMA_STATIC_DISPLAYS(0)" - -# PMC (soc/intel/tigerlake/pmc.c) - # Disable deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "0" - register "deep_s5_enable_dc" = "0" - register "deep_sx_config" = "0" - # PM Util (soc/intel/tigerlake/pmutil.c) # GPE configuration # sudo devmem2 0xfe001920 (pmc_bar + GPIO_GPE_CFG) @@ -233,67 +101,83 @@ chip soc/intel/tigerlake register "pmc_gpe0_dw1" = "PMC_GPP_B" register "pmc_gpe0_dw2" = "PMC_GPP_D" -# SMI Handler (soc/intel/tigerlake/smihandler.c) - #TODO Disable HECI - register "HeciEnabled" = "1" - # Actual device tree device cpu_cluster 0 on device lapic 0 on end end - #TODO: Adjustments device domain 0 on - #From EDS(575683) - device pci 00.0 on end # Host Bridge 0x9A14:U/0x9A12:Y - device pci 02.0 on end # Graphics - device pci 04.0 on end # DPTF 0x9A03 - device pci 05.0 off end # IPU 0x9A19 - device pci 06.0 on - chip soc/intel/common/block/pcie/rtd3 - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C13)" - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C22)" - #TODO: Support disable/enable CPU RP clock - register "srcclk_pin" = "-1" - device generic 0 on end - end - end # PEG60 0x9A09 - device pci 07.0 on end # TBT_PCIe0 0x9A23 - device pci 07.1 off end # TBT_PCIe1 0x9A25 - device pci 07.2 off end # TBT_PCIe2 0x9A27 - device pci 07.3 off end # TBT_PCIe3 0x9A29 - device pci 08.0 on end # GNA 0x9A11 - device pci 09.0 off end # NPK 0x9A33 - device pci 0a.0 on end # Crash-log SRAM 0x9A0D - device pci 0d.0 on end # USB xHCI 0x9A13 - device pci 0d.1 off end # USB xDCI (OTG) 0x9A15 - device pci 0d.2 on + #From CPU EDS(575683) + device ref system_agent on end + device ref igpu on + # DDIA is eDP + register "DdiPortAConfig" = "1" + register "DdiPortAHpd" = "1" + register "DdiPortADdc" = "0" + + # DDIB is HDMI + register "DdiPortBConfig" = "0" + register "DdiPortBHpd" = "1" + register "DdiPortBDdc" = "1" + + register "gfx" = "GMA_STATIC_DISPLAYS(0)" + end + device ref dptf on + register "Device4Enable" = "1" + end + device ref peg on + # PCIe PEG0 x4, Clock 3 (SSD1) + register "PcieClkSrcUsage[3]" = "0x40" + register "PcieClkSrcClkReq[3]" = "3" + #TODO + # chip soc/intel/common/block/pcie/rtd3 + # register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C13)" + # register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C22)" + # #TODO: Support disable/enable CPU RP clock + # register "srcclk_pin" = "-1" + # device generic 0 on end + # end + + #TODO: Hybrid storage mode? + register "HybridStorageMode" = "0" + end + device ref tbt_pcie_rp0 on end # J_TYPEC1 + device ref gna on end + device ref north_xhci on # J_TYPEC1 + register "TcssXhciEn" = "1" + # TODO: usb/acpi + end + device ref tbt_dma0 on # J_TYPEC1 chip drivers/intel/usb4/retimer register "power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A23)" device generic 0 on end end - end # TBT DMA0 0x9A1B - device pci 0d.3 off end # TBT DMA1 0x9A1D - device pci 0e.0 off end # VMD 0x9A0B + end # From PCH EDS(576591) - device pci 10.2 on end # CNVi: BT 0xA0F5 - A0F7 - device pci 10.6 off end # THC0 0xA0D0 - device pci 10.7 off end # THC1 0xA0D1 - device pci 12.0 off end # SensorHUB 0xA0FC - device pci 12.6 off end # GSPI2 0x34FB - device pci 13.0 off end # GSPI3 0xA0FD - device pci 14.0 on end # USB3.1 xHCI 0xA0ED - device pci 14.1 off end # USB3.1 xDCI 0xA0EE - device pci 14.2 on end # Shared RAM 0xA0EF - device pci 14.3 on + device ref cnvi_bt on end + device ref south_xhci on + # USB2 + register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # J_USB3_1 + register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # J_USB3_2 + register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1 + register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Camera + register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth + # USB3 + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB3_1 + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB3_2 + # TODO: usb/acpi + end + device ref shared_ram on end + device ref cnvi_wifi on chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device generic 0 on end end - end # CNVi: WiFi 0xA0F0 - A0F3 - - device pci 15.0 on # I2C0 0xA0E8 + end + device ref i2c0 on + # Touchpad I2C bus + register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci" chip drivers/i2c/hid register "generic.hid" = ""PNP0C50"" register "generic.desc" = ""ELAN Touchpad"" @@ -302,76 +186,70 @@ chip soc/intel/tigerlake register "hid_desc_reg_offset" = "0x01" device i2c 15 on end end - end # I2C0 - device pci 15.1 on end # I2C1 0xA0E9 - device pci 15.2 off end # I2C2 0xA0EA - device pci 15.3 off end # I2C3 0xA0EB - device pci 16.0 on end # HECI1 0xA0E0 - device pci 16.1 off end # HECI2 0xA0E1 - device pci 16.2 off end # CSME 0xA0E2 - device pci 16.3 off end # CSME 0xA0E3 - device pci 16.4 off end # HECI3 0xA0E4 - device pci 16.5 off end # HECI4 0xA0E5 - device pci 17.0 on end # SATA 0xA0D3 - device pci 19.0 off end # I2C4 0xA0C5 - device pci 19.1 off end # I2C5 0xA0C6 - device pci 19.2 off end # UART2 0xA0C7 - device pci 1c.0 off end # RP1 0xA0B8 - device pci 1c.1 off end # RP2 0xA0B9 - device pci 1c.2 on end # RP3 0xA0BA - device pci 1c.3 off end # RP4 0xA0BB - device pci 1c.4 off end # RP5 0xA0BC - device pci 1c.5 on end # RP6 0xA0BD - device pci 1c.6 off end # RP7 0xA0BE - device pci 1c.7 off end # RP8 0xA0BF - device pci 1d.0 on + end + device ref i2c1 on + #TODO: USB-PD? + register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci" + end + device ref heci1 on + #TODO Disable ME and HECI + register "HeciEnabled" = "1" + end + device ref sata on + # SATA1 (SSD2) + register "SataPortsEnable[1]" = "1" + register "SataPortsDevSlp[1]" = "1" + register "SataPortsEnableDitoConfig[1]" = "1" + register "SataSalpSupport" = "1" + end + device ref pcie_rp3 on + # PCIe root port #3 x1, Clock 1 (WLAN) + register "PcieRpEnable[2]" = "1" + register "PcieRpLtrEnable[2]" = "1" + register "PcieClkSrcUsage[1]" = "2" + register "PcieClkSrcClkReq[1]" = "1" + end + device ref pcie_rp6 on + # PCIe root port #6 x1, Clock 2 (CARD) + register "PcieRpEnable[5]" = "1" + register "PcieRpLtrEnable[5]" = "1" + register "PcieClkSrcUsage[2]" = "5" + register "PcieClkSrcClkReq[2]" = "2" end + device ref pcie_rp9 on + # PCIe root port #9 x4, Clock 0 (SSD2) + register "PcieRpEnable[8]" = "1" + register "PcieRpLtrEnable[8]" = "1" + register "PcieClkSrcUsage[0]" = "8" + register "PcieClkSrcClkReq[0]" = "0" chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D9)" register "srcclk_pin" = "0" device generic 0 on end end - end # RP9 0xA0B0 - device pci 1d.1 off end # RP10 0xA0B1 - device pci 1d.2 off end # RP11 0xA0B2 - device pci 1d.3 off end # RP12 0xA0B3 - device pci 1e.0 off end # UART0 0xA0A8 - device pci 1e.1 off end # UART1 0xA0A9 - device pci 1e.2 off end # GSPI0 0xA0AA - device pci 1e.3 off end # GSPI1 0xA0AB - device pci 1f.0 on # eSPI 0xA080 - A09F + end + device ref pch_espi on + # LPC configuration from lspci -s 1f.0 -xxx + # Address 0x84: Decode 0x80 - 0x8F (Port 80) + register "gen1_dec" = "0x000c0081" + # Address 0x88: Decode 0x68 - 0x6F (PMC) + register "gen2_dec" = "0x00040069" + # Address 0x8C: Decode 0xE00 - 0xEFF (AP/EC command) + register "gen3_dec" = "0x00fc0E01" + # Address 0x90: Decode 0xF00 - 0xFFF (AP/EC debug) + register "gen4_dec" = "0x00fc0F01" + # LPC TPM chip drivers/pc80/tpm device pnp 0c31.0 on end end end - device pci 1f.1 on end # P2SB 0xA0A0 - device pci 1f.2 hidden # PMC 0xA0A1 - # TODO: verify - # The pmc_mux chip driver is a placeholder for the - # PMC.MUX device in the ACPI hierarchy. - # chip drivers/intel/pmc_mux - # device generic 0 on - # chip drivers/intel/pmc_mux/conn - # register "usb2_port_number" = "2" - # register "usb3_port_number" = "2" - # # SBU is fixed, HSL follows CC - # register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" - # device generic 0 on end - # end - # chip drivers/intel/pmc_mux/conn - # register "usb2_port_number" = "6" - # register "usb3_port_number" = "4" - # # SBU is fixed, HSL follows CC - # register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" - # device generic 1 on end - # end - # end - # end - end # PMC - device pci 1f.3 on end # Intel HD audio 0xA0C8-A0CF - device pci 1f.4 on end # SMBus 0xA0A3 - device pci 1f.5 on end # SPI 0xA0A4 - device pci 1f.6 off end # GbE 0x15E1/0x15E2 - device pci 1f.7 off end # TH 0xA0A6 + device ref p2sb on end + device ref hda on + register "PchHdaAudioLinkHdaEnable" = "1" + end + device ref smbus on + register "SmbusEnable" = "1" + end + device ref fast_spi on end end end