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mainboard: Format irq_tables.c

Browse Source 
Run the command below to format the files `irq_tables.c` of (mostly AMD)
mainboards correctly with GNU indent 2.2.10.

```
$ git grep -l 'if (sum != pirq->checksum) {' | xargs indent -l
```

Fix up the following two checkpatch.pl errors manually.

```
ERROR: that open brace { should be on the previous line
#1219: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:129:
+			uint8_t reg[8] =
+			    { 0x41, 0x42, 0x43, 0x44, 0x60, 0x61, 0x62, 0x63 };

ERROR: that open brace { should be on the previous line
#1221: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:131:
+			uint8_t irq[8] =
+			    { 0x0A, 0X0B, 0X0, 0X0a, 0X0B, 0X05, 0X0, 0X07 };

```

This is needed, so that follow-up commits, fixing checkpatch.pl errors
and warnings, won’t run into conflicts with the git commit hooks, when
for example, spaces instead of tabs are used for indentation.

Change-Id: If254723f3013377fb3b9b08dd5eca6b76730ec4a
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/15932
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Paul Menzel
2016-07-28 17:20:20 +02:00
committed by Martin Roth
parent 14caed85e1
commit 95fe8fb1e0
68 changed files with 1037 additions and 983 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/amd/bettong/irq_tables.c
View File

@@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

1
src/mainboard/amd/db-ft3b-lc/irq_tables.c
View File

@@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

3
src/mainboard/amd/dbm690t/irq_tables.c
View File

@@ -21,8 +21,6 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern unsigned long sbdn_sb600;

12
src/mainboard/amd/dinar/irq_tables.c
View File

@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@@ -22,9 +21,9 @@
#include <cpu/amd/amdfam15.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
u8 slot, u8 rfu)
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
u8 slot, u8 rfu)
{
pirq_info->bus = bus;
pirq_info->devfn = devfn;
@@ -79,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

13
src/mainboard/amd/inagua/irq_tables.c
View File

@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@@ -21,11 +20,10 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
u8 slot, u8 rfu)
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
u8 slot, u8 rfu)
{
pirq_info->bus = bus;
pirq_info->devfn = devfn;
@@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

1
src/mainboard/amd/lamar/irq_tables.c
View File

@@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

3
src/mainboard/amd/mahogany/irq_tables.c
View File

@@ -21,8 +21,6 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

3
src/mainboard/amd/mahogany_fam10/irq_tables.c
View File

@@ -21,8 +21,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

1
src/mainboard/amd/olivehill/irq_tables.c
View File

@@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

1
src/mainboard/amd/olivehillplus/irq_tables.c
View File

@@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

1
src/mainboard/amd/parmer/irq_tables.c
View File

@@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

7
src/mainboard/amd/persimmon/irq_tables.c
View File

@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

3
src/mainboard/amd/pistachio/irq_tables.c
View File

@@ -21,8 +21,6 @@
#include <cpu/amd/amdk8_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern u32 sbdn_sb600;

127
src/mainboard/amd/serengeti_cheetah/irq_tables.c
View File

@@ -20,12 +20,14 @@
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
uint8_t devfn, uint8_t link0, uint16_t bitmap0,
uint8_t link1, uint16_t bitmap1, uint8_t link2,
uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
pirq_info->devfn = devfn;
pirq_info->bus = bus;
pirq_info->devfn = devfn;
pirq_info->irq[0].link = link0;
pirq_info->irq[0].bitmap = bitmap0;
@@ -37,12 +39,9 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
pirq_info->irq[3].bitmap = bitmap3;
pirq_info->slot = slot;
pirq_info->rfu = rfu;
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@@ -51,30 +50,30 @@ unsigned long write_pirq_routing_table(unsigned long addr)
unsigned slot_num;
uint8_t *v;
uint8_t sum=0;
int i;
uint8_t sum = 0;
int i;
struct mb_sysconf_t *m;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
m = sysconf.mb;
/* Align the table to be 16 byte aligned. */
addr += 15;
addr &= ~15;
/* Align the table to be 16 byte aligned. */
addr += 15;
addr &= ~15;
/* This table must be between 0xf0000 & 0x100000 */
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
/* This table must be between 0xf0000 & 0x100000 */
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_8111_0;
pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
pirq->rtr_devfn = ((sysconf.sbdn + 1) << 3) | 0;
pirq->exclusive_irqs = 0;
@@ -85,37 +84,44 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
{
device_t dev;
dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn+1,3));
if (dev) {
/* initialize PCI interupts - these assignments depend
on the PCB routing of PINTA-D
{
device_t dev;
dev =
dev_find_slot(m->bus_8111_0,
PCI_DEVFN(sysconf.sbdn + 1, 3));
if (dev) {
/* initialize PCI interupts - these assignments depend
on the PCB routing of PINTA-D
PINTA = IRQ3
PINTB = IRQ5
PINTC = IRQ10
PINTD = IRQ11
*/
pci_write_config16(dev, 0x56, 0xba53);
}
}
PINTA = IRQ3
PINTB = IRQ5
PINTC = IRQ10
PINTD = IRQ11
*/
pci_write_config16(dev, 0x56, 0xba53);
}
}
//pci bridge
printk(BIOS_DEBUG, "setting Onboard AMD Southbridge\n");
static const unsigned char slotIrqs_1_4[4] = { 3, 5, 10, 11 };
pci_assign_irqs(m->bus_8111_0, sysconf.sbdn+1, slotIrqs_1_4);
write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn+1)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
printk(BIOS_DEBUG, "setting Onboard AMD Southbridge\n");
static const unsigned char slotIrqs_1_4[4] = { 3, 5, 10, 11 };
pci_assign_irqs(m->bus_8111_0, sysconf.sbdn + 1, slotIrqs_1_4);
write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn + 1) << 3) | 0,
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
printk(BIOS_DEBUG, "setting Onboard AMD USB\n");
static const unsigned char slotIrqs_8111_1_0[4] = { 0, 0, 0, 11};
pci_assign_irqs(m->bus_8111_1, 0, slotIrqs_8111_1_0);
write_pirq_info(pirq_info, m->bus_8111_1,0, 0, 0, 0, 0, 0, 0, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
printk(BIOS_DEBUG, "setting Onboard AMD USB\n");
static const unsigned char slotIrqs_8111_1_0[4] = { 0, 0, 0, 11 };
pci_assign_irqs(m->bus_8111_1, 0, slotIrqs_8111_1_0);
write_pirq_info(pirq_info, m->bus_8111_1, 0, 0, 0, 0, 0, 0, 0, 0x4,
0xdef8, 0, 0);
pirq_info++;
slot_num++;
//pcix bridge
// write_pirq_info(pirq_info, m->bus_8132_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
@@ -123,30 +129,33 @@ unsigned long write_pirq_routing_table(unsigned long addr)
int j = 0;
for(i=1; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
j++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
j++;
}
}
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)
sum += v[i];
for (i = 0; i < pirq->size; i++)
sum += v[i];
sum = pirq->checksum - sum;
if (sum != pirq->checksum) {
pirq->checksum = sum;
}
if (sum != pirq->checksum) {
pirq->checksum = sum;
}
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

82
src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c
View File

@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@@ -23,27 +22,25 @@
#include "mb_sysconf.h"
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, u8 link0, u16 bitmap0,
u8 link1, u16 bitmap1, u8 link2, u16 bitmap2,u8 link3, u16 bitmap3,
u8 slot, u8 rfu)
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
u8 slot, u8 rfu)
{
pirq_info->bus = bus;
pirq_info->devfn = devfn;
pirq_info->irq[0].link = link0;
pirq_info->irq[0].bitmap = bitmap0;
pirq_info->irq[1].link = link1;
pirq_info->irq[1].bitmap = bitmap1;
pirq_info->irq[2].link = link2;
pirq_info->irq[2].bitmap = bitmap2;
pirq_info->irq[3].link = link3;
pirq_info->irq[3].bitmap = bitmap3;
pirq_info->irq[0].link = link0;
pirq_info->irq[0].bitmap = bitmap0;
pirq_info->irq[1].link = link1;
pirq_info->irq[1].bitmap = bitmap1;
pirq_info->irq[2].link = link2;
pirq_info->irq[2].bitmap = bitmap2;
pirq_info->irq[3].link = link3;
pirq_info->irq[3].bitmap = bitmap3;
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
@@ -52,12 +49,12 @@ unsigned long write_pirq_routing_table(unsigned long addr)
u32 slot_num;
u8 *v;
u8 sum=0;
u8 sum = 0;
int i;
struct mb_sysconf_t *m;
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
m = sysconf.mb;
@@ -69,13 +66,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (u8 *)(addr);
v = (u8 *) (addr);
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_8111_0;
pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
pirq->rtr_devfn = ((sysconf.sbdn + 1) << 3) | 0;
pirq->exclusive_irqs = 0;
@@ -86,38 +83,47 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
pirq_info = (void *) ( &pirq->checksum + 1);
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn+1)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, m->bus_8111_0, ((sysconf.sbdn + 1) << 3) | 0,
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
//pcix bridge
// write_pirq_info(pirq_info, m->bus_8132_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
// pirq_info++; slot_num++;
// write_pirq_info(pirq_info, m->bus_8132_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
// pirq_info++; slot_num++;
int j=0;
int j = 0;
for(i=1; i< sysconf.hc_possible_num; i++) {
if(!(sysconf.pci1234[i] & 0x1) ) continue;
for (i = 1; i < sysconf.hc_possible_num; i++) {
if (!(sysconf.pci1234[i] & 0x1))
continue;
u32 busn = (sysconf.pci1234[i] >> 12) & 0xff;
u32 devn = sysconf.hcdn[i] & 0xff;
write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
j++;
}
#if CONFIG_CBB
write_pirq_info(pirq_info, CONFIG_CBB, (0<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
if(sysconf.nodes>32) {
write_pirq_info(pirq_info, CONFIG_CBB-1, (0<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
write_pirq_info(pirq_info, CONFIG_CBB, (0 << 3) | 0, 0x1, 0xdef8, 0x2,
0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++;
slot_num++;
if (sysconf.nodes > 32) {
write_pirq_info(pirq_info, CONFIG_CBB - 1, (0 << 3) | 0, 0x1,
0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8,
0, 0);
pirq_info++;
slot_num++;
}
#endif
@@ -135,6 +141,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
return (unsigned long)pirq_info;
}

7
src/mainboard/amd/south_station/irq_tables.c
View File

@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

1
src/mainboard/amd/thatcher/irq_tables.c
View File

@@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
unsigned long write_pirq_routing_table(unsigned long addr)
{
struct irq_routing_table *pirq;

3
src/mainboard/amd/tilapia_fam10/irq_tables.c
View File

@@ -21,8 +21,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@@ -41,6 +39,7 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

8
src/mainboard/amd/torpedo/irq_tables.c
View File

@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@@ -21,8 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam12.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@@ -81,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)

7
src/mainboard/amd/union_station/irq_tables.c
View File

@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
@@ -21,7 +20,6 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
@@ -80,19 +78,14 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;
slot_num++;
pirq->size = 32 + 16 * slot_num;
for (i = 0; i < pirq->size; i++)