tegra132: Change all SoC headers to <soc/headername.h> system

This patch aligns tegra132 to the new SoC header include scheme.
Also alphabetized headers in affected files since we touch them anyway.

BUG=None
TEST=Tested with whole series. Compiled Rush_Ryu.

Change-Id: I5cdf4008a65db84f15c937ef53aab5e4d3ef24c4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d5c5c63d7b6399d3eb8a211b15d47829fe93a591
Original-Change-Id: Ifafd4d42d4fb04a1c37e8a5f23877c2b550cf44c
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/224505
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9369
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/mainboard/google/rush/boardid.c

@@ -17,10 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <console/console.h>
-#include <soc/nvidia/tegra132/gpio.h>
-
 #include <boardid.h>
+#include <console/console.h>
+#include <soc/gpio.h>
 
 uint8_t board_id(void)
 {

src/mainboard/google/rush/bootblock.c

@@ -21,13 +21,13 @@
 #include <console/console.h>
 #include <device/i2c.h>
 #include <soc/addressmap.h>
+#include <soc/clk_rst.h>
 #include <soc/bootblock.h>
 #include <soc/clock.h>
-#include <soc/padconfig.h>
 #include <soc/funitcfg.h>
 #include <soc/nvidia/tegra/i2c.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
-#include <soc/nvidia/tegra132/spi.h>	/* FIXME: move back to soc code? */
+#include <soc/padconfig.h>
+#include <soc/spi.h>	/* FIXME: move back to soc code? */
 
 #include "pmic.h"
 

src/mainboard/google/rush/chromeos.c

@@ -21,9 +21,9 @@
 #include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 #include <ec/google/chromeec/ec_commands.h>
+#include <soc/gpio.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
-#include <soc/nvidia/tegra132/gpio.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)
 {

src/mainboard/google/rush/mainboard.c

@@ -18,17 +18,16 @@
  */
 
 #include <arch/mmu.h>
-#include <device/device.h>
 #include <boot/coreboot_tables.h>
-
+#include <device/device.h>
 #include <memrange.h>
-#include <soc/clock.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
-#include <soc/nvidia/tegra132/spi.h>
 #include <soc/addressmap.h>
-#include <soc/padconfig.h>
+#include <soc/clk_rst.h>
+#include <soc/clock.h>
 #include <soc/funitcfg.h>
 #include <soc/nvidia/tegra/usb.h>
+#include <soc/padconfig.h>
+#include <soc/spi.h>
 
 static const struct pad_config sdmmc3_pad[] = {
 	/* MMC3(SDCARD) */

src/mainboard/google/rush/memlayout.ld

@@ -1 +1 @@
-#include <soc/nvidia/tegra132/memlayout.ld>
+#include <soc/memlayout.ld>

src/mainboard/google/rush/pmic.c

@@ -18,13 +18,13 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <boardid.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/i2c.h>
 #include <stdint.h>
 #include <stdlib.h>
 
-#include <boardid.h>
 #include "pmic.h"
 #include "reset.h"
 

src/mainboard/google/rush/reset.c

@@ -18,8 +18,8 @@
  */
 
 #include <arch/io.h>
+#include <soc/gpio.h>
 #include <reset.h>
-#include <soc/nvidia/tegra132/gpio.h>
 
 void hard_reset(void)
 {

src/mainboard/google/rush/romstage.c

@@ -17,13 +17,12 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <soc/romstage.h>
-
 #include <soc/addressmap.h>
 #include <soc/clock.h>
-#include <soc/padconfig.h>
-#include <soc/nvidia/tegra/i2c.h>
 #include <soc/funitcfg.h>
+#include <soc/nvidia/tegra/i2c.h>
+#include <soc/padconfig.h>
+#include <soc/romstage.h>
 
 static const struct pad_config padcfgs[] = {
 	/* SOC_WARM_RESET_L */

src/mainboard/google/rush_ryu/boardid.c

@@ -17,11 +17,11 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <boardid.h>
 #include <console/console.h>
-#include <soc/nvidia/tegra132/gpio.h>
+#include <soc/gpio.h>
 #include <stdlib.h>
 
-#include <boardid.h>
 #include "gpio.h"
 
 /*

src/mainboard/google/rush_ryu/bootblock.c

@@ -22,11 +22,11 @@
 #include <device/i2c.h>
 #include <soc/addressmap.h>
 #include <soc/bootblock.h>
+#include <soc/clk_rst.h>
 #include <soc/clock.h>
 #include <soc/funitcfg.h>
-#include <soc/padconfig.h>
 #include <soc/nvidia/tegra/i2c.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
+#include <soc/padconfig.h>
 
 #include "pmic.h"
 

src/mainboard/google/rush_ryu/chromeos.c

@@ -23,6 +23,7 @@
 #include <ec/google/chromeec/ec_commands.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
+
 #include "gpio.h"
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/google/rush_ryu/gpio.h

@@ -20,7 +20,7 @@
 #ifndef __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
 #define __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
 
-#include <soc/nvidia/tegra132/gpio.h>
+#include <soc/gpio.h>
 
 /* Board ID definitions. */
 enum {

src/mainboard/google/rush_ryu/mainboard.c

@@ -18,16 +18,15 @@
  */
 
 #include <arch/mmu.h>
-#include <device/device.h>
 #include <boot/coreboot_tables.h>
+#include <device/device.h>
 #include <memrange.h>
-
 #include <soc/addressmap.h>
+#include <soc/clk_rst.h>
 #include <soc/clock.h>
 #include <soc/funitcfg.h>
-#include <soc/padconfig.h>
-#include <soc/nvidia/tegra132/clk_rst.h>
 #include <soc/nvidia/tegra/i2c.h>
+#include <soc/padconfig.h>
 
 static const struct pad_config mmcpads[] = {
 	/* MMC4 (eMMC) */

src/mainboard/google/rush_ryu/memlayout.ld

@@ -1 +1 @@
-#include <soc/nvidia/tegra132/memlayout.ld>
+#include <soc/memlayout.ld>

src/mainboard/google/rush_ryu/pmic.c

@@ -23,6 +23,7 @@
 #include <device/i2c.h>
 #include <stdint.h>
 #include <stdlib.h>
+
 #include "pmic.h"
 #include "reset.h"
 

src/mainboard/google/rush_ryu/reset.c

@@ -19,6 +19,7 @@
 
 #include <arch/io.h>
 #include <reset.h>
+
 #include "gpio.h"
 
 void hard_reset(void)

src/mainboard/google/rush_ryu/romstage.c

@@ -21,9 +21,10 @@
 #include <soc/addressmap.h>
 #include <soc/clock.h>
 #include <soc/funitcfg.h>
-#include <soc/padconfig.h>
 #include <soc/nvidia/tegra/i2c.h>
+#include <soc/padconfig.h>
 #include <soc/romstage.h>
+
 #include "gpio.h"
 #include "pmic.h"