Remove ESPI config and enable LPC decodes for EC command and debug
Change-Id: I301829fc67fc1b255cf1a6f468a5433b64e03828
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@@ -1,9 +1,32 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <bootblock_common.h>
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#include <amdblocks/lpc.h>
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#include <console/console.h>
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#include "gpio.h"
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void bootblock_mainboard_early_init(void)
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{
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post_code(0x76);
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post_code(0x01);
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mainboard_program_early_gpios();
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post_code(0x76);
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post_code(0x02);
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// AP/EC command
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lpc_set_wideio_range(0xE00, 256);
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// AP/EC debug
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lpc_set_wideio_range(0xF00, 256);
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post_code(0x76);
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post_code(0x03);
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}
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void bootblock_mainboard_init(void)
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{
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post_code(0x76);
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post_code(0x10);
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}
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@@ -9,41 +9,6 @@ chip soc/amd/cezanne
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.dmic_present = 1,
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}"
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register "common_config.espi_config" = "{
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.std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X60_0X64_EN,
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/* EC PM channel */
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.generic_io_range[0] = {
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.base = 0x62,
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/*
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* Only 0x62 and 0x66 are required. But, this is not supported by
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* standard IO decodes and there are only 4 generic I/O windows
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* available. Hence, open a window from 0x62-0x67.
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*/
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.size = 5,
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},
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/* AP/EC debug */
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.generic_io_range[1] = {
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.base = 0xE00,
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.size = 256,
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},
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/* AP/EC debug */
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.generic_io_range[2] = {
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.base = 0xF00,
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.size = 256,
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},
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.io_mode = ESPI_IO_MODE_QUAD,
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.op_freq_mhz = ESPI_OP_FREQ_33_MHZ,
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.crc_check_enable = 1,
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.alert_pin = ESPI_ALERT_PIN_OPEN_DRAIN,
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.periph_ch_en = 1,
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.vw_ch_en = 1,
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.oob_ch_en = 0,
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.flash_ch_en = 0,
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.vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1),
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}"
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register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL |
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GPIO_I2C2_SCL | GPIO_I2C3_SCL"
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# I2C Pad Control RX Select Configuration
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