sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/picasso: Set eMMC preset UPDs

Browse Source 
Now that all boards have bootable driver strengths and init frequency,
we can pass them to FSP.

BUG=b:159823235
TEST=Boot ezkinil to kernel and print presets.

SDHC0x8F0 Initialization 3.3V or 1.8V => 0x03ff
 14 => 0 [B]: DvrStrength
 10 => 0: ClkGen
 00 => 0x3ff: SdClkFreq
SDHC0x8F2 Default Speed 3.3V => 0x0004
 14 => 0 [B]: DvrStrength
 10 => 0: ClkGen
 00 => 0x4: SdClkFreq
SDHC0x8F4 High Speed 3.3V => 0x0002
 14 => 0 [B]: DvrStrength
 10 => 0: ClkGen
 00 => 0x2: SdClkFreq
SDHC0x8F6 SDR12 1.8V => 0x0008
 14 => 0 [B]: DvrStrength
 10 => 0: ClkGen
 00 => 0x8: SdClkFreq
SDHC0x8F8 SDR25 1.8V => 0x0004
 14 => 0 [B]: DvrStrength
 10 => 0: ClkGen
 00 => 0x4: SdClkFreq
SDHC0x8FA SDR50 1.8V => 0x0002
 14 => 0 [B]: DvrStrength
 10 => 0: ClkGen
 00 => 0x2: SdClkFreq
SDHC0x8FC SDR104 1.8V => 0x4000
 14 => 0x1 [A]: DvrStrength
 10 => 0: ClkGen
 00 => 0: SdClkFreq
SDHC0x8FE DDR50 1.8V => 0x0002
 14 => 0 [B]: DvrStrength
 10 => 0: ClkGen
 00 => 0x2: SdClkFreq
SDHC0x900 HS400 => 0x4000
 14 => 0x1 [A]: DvrStrength
 10 => 0: ClkGen
 00 => 0: SdClkFreq


Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I5fe5c0a5a5ecf292ce8703e9c9ea80b6f1b6440e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45661
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Raul E Rangel
2020-09-23 12:10:02 -06:00
committed by Patrick Georgi
parent 94be1f7399
commit 96c704a167
1 changed files with 5 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
src/soc/amd/picasso/fsp_params.c
View File

@@ -55,6 +55,11 @@ static void fsps_update_emmc_config(FSP_S_CONFIG *scfg,
}
scfg->emmc0_mode = val;
scfg->emmc0_sdr104_hs400_driver_strength =
cfg->emmc_config.sdr104_hs400_driver_strength;
scfg->emmc0_ddr50_driver_strength = cfg->emmc_config.ddr50_driver_strength;
scfg->emmc0_sdr50_driver_strength = cfg->emmc_config.sdr50_driver_strength;
scfg->emmc0_init_khz_preset = cfg->emmc_config.init_khz_preset;
}
static void fill_dxio_descriptors(FSP_S_CONFIG *scfg,