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rockchip: rk3399: Add support i2s

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This patch enable and configure the clocks and IOMUX for i2s audio path,
and the i2s0 clock is from CPLL.

Please refer to TRM V0.3 Part 1 Chapter 3 CRU, P126/P128/P144/P154/P155
for the i2s clock div and gate setting.

BRANCH=none
BUG=chrome-os-partner:52172
TEST=boot kevin rev1, press ctrl+u and hear the beep voice.

Change-Id: Id00baac965c8b9213270ba5516e1ca684e4304a6
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 9c58fa7
Original-Change-Id: I130a874a0400712317e5e7a8b3b10a6f04586f68
Original-Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/347526
Original-Commit-Ready: Wonjoon Lee <woojoo.lee@samsung.com>
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://review.coreboot.org/15034
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Xing Zheng
2016-05-19 11:39:20 +08:00
committed by Martin Roth
parent 8f8cf4d336
commit 96fbc31027
4 changed files with 76 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
src/mainboard/google/gru/mainboard.c
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@@ -92,6 +92,23 @@ static void configure_sdmmc(void)
write32(&rk3399_grf->iomux_sdmmc, IOMUX_SDMMC);
}
static void configure_codec(void)
{
write32(&rk3399_grf->iomux_i2s0, IOMUX_I2S0);
write32(&rk3399_grf->iomux_i2sclk, IOMUX_I2SCLK);
/* AUDIO IO domain 1.8V voltage selection */
write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 1));
/* CPU1_P1.8V_AUDIO_PWREN for P1.8_AUDIO */
gpio_output(GPIO(0, A, 2), 1);
/* set CPU1_SPK_PA_EN output */
gpio_output(GPIO(1, A, 2), 0);
rkclk_configure_i2s(12288000);
}
static void configure_display(void)
{
/* set pinmux for edp HPD*/
@@ -105,6 +122,7 @@ static void mainboard_init(device_t dev)
{
configure_sdmmc();
configure_emmc();
configure_codec();
configure_display();
}