coreboot: move TS_END_ROMSTAGE to one spot

While the romstage code flow is not consistent across all
mainboards/chipsets there is only one way of running ramstage
from romstage -- run_ramstage(). Move the
timestamp_add_now(TS_END_ROMSTAGE) to be within run_ramstage().

BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built and booted glados. TS_END_ROMSTAGE still present in
     timestamp table.

Change-Id: I4b584e274ce2107e83ca6425491fdc71a138e82c
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11700
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Aaron Durbin
2015-09-23 19:54:12 -05:00
parent a40032780f
commit 9796f60c62
52 changed files with 2 additions and 95 deletions

View File

@@ -224,8 +224,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
rs780_before_pci_init();
sb7xx_51xx_before_pci_init();
timestamp_add_now(TS_END_ROMSTAGE);
post_code(0x42);
post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB.
post_code(0x43); // Should never see this post code.