sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/system76/gaze17: Enable SATA DEVSLP

Browse Source 
Change-Id: If7dfbf7816b0487fd03d11fbd60649de71b3e654
This commit is contained in:
Jeremy Soller
2022-05-26 07:33:57 -06:00
parent 7d38db7d49
commit 9798b1f3fd
2 changed files with 3 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/system76/gaze17/devicetree.cb
View File

@@ -142,6 +142,7 @@ chip soc/intel/alderlake
device ref heci1 on end device ref heci1 on end
device ref sata on device ref sata on
register "sata_ports_enable[1]" = "1" # SSD2 (SATA1A) register "sata_ports_enable[1]" = "1" # SSD2 (SATA1A)
register "sata_ports_dev_slp[1]" = "1" # GPP_H13 (DEVSLP1B)
end end
device ref pcie_rp5 on device ref pcie_rp5 on
# PCIe root port #5 x1, Clock 2 (WLAN) # PCIe root port #5 x1, Clock 2 (WLAN)

2
src/mainboard/system76/gaze17/ramstage.c
View File

@@ -11,5 +11,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
params->PchSerialIoI2cSclPinMux[0] = 0x1947a405; // GPP_H5 params->PchSerialIoI2cSclPinMux[0] = 0x1947a405; // GPP_H5
params->PchSerialIoI2cSdaPinMux[0] = 0x1947c404; // GPP_H4 params->PchSerialIoI2cSdaPinMux[0] = 0x1947c404; // GPP_H4
params->SataPortDevSlpPinMux[1] = 0x5967400d; // GPP_H13 (DEVSLP1B)
variant_configure_gpios(); variant_configure_gpios();
} }