skylake: update processor power limits configuration
Update processor power limit configuration parameters based on common code base support for Intel Skylake SoC based platforms. BRANCH=None BUG=None TEST=Built and tested on nami system Change-Id: Idc82f3d2f805b92fb3005d2f49098e55cb142e45 Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41238 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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committed by
Patrick Georgi
parent
19c2ce7639
commit
97c5464443
@@ -14,6 +14,7 @@
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#include <intelblocks/lpc_lib.h>
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#include <intelblocks/mp_init.h>
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#include <intelblocks/pcie_rp.h>
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#include <intelblocks/power_limit.h>
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#include <intelblocks/xdci.h>
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#include <intelblocks/p2sb.h>
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#include <intelpch/lockdown.h>
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@@ -124,10 +125,14 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
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config = config_of_soc();
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mainboard_silicon_init_params(params);
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struct soc_power_limits_config *soc_confg;
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config_t *confg = config_of_soc();
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soc_confg = &confg->power_limits_config;
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/* Set PsysPmax if it is available from DT */
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if (config->psys_pmax) {
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if (soc_confg->psys_pmax) {
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/* PsysPmax is in unit of 1/8 Watt */
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tconfig->PsysPmax = config->psys_pmax * 8;
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tconfig->PsysPmax = soc_confg->psys_pmax * 8;
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printk(BIOS_DEBUG, "psys_pmax = %d\n", tconfig->PsysPmax);
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}
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