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skylake: update processor power limits configuration

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Update processor power limit configuration parameters based on
common code base support for Intel Skylake SoC based platforms.

BRANCH=None
BUG=None
TEST=Built and tested on nami system

Change-Id: Idc82f3d2f805b92fb3005d2f49098e55cb142e45
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41238
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Sumeet R Pawnikar
2020-05-10 01:24:11 +05:30
committed by Patrick Georgi
parent 19c2ce7639
commit 97c5464443
34 changed files with 121 additions and 260 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/soc/intel/skylake/systemagent.c
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@@ -4,6 +4,7 @@
#include <delay.h>
#include <device/device.h>
#include <device/pci_ops.h>
#include <intelblocks/power_limit.h>
#include <intelblocks/systemagent.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
@@ -60,6 +61,9 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index)
*/
void soc_systemagent_init(struct device *dev)
{
struct soc_power_limits_config *soc_config;
config_t *config;
/* Enable Power Aware Interrupt Routing */
enable_power_aware_intr();
@@ -68,7 +72,9 @@ void soc_systemagent_init(struct device *dev)
/* Configure turbo power limits 1ms after reset complete bit */
mdelay(1);
set_power_limits(28);
config = config_of_soc();
soc_config = &config->power_limits_config;
set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config);
}
int soc_get_uncore_prmmr_base_and_mask(uint64_t *prmrr_base,