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mb/system76/rpl/dt: Use comma separated list for arrays

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In order to improve the readability of the settings, use a comma
separated list to assign values to their indexes instead of repeating
the option name for each index.

Don't convert the settings for PCIe root ports as they should stay in
the device scope of them.

While on it, remove superfluous comments related to modified lines.

Change-Id: I15f326774850b3c9562f7eebb78f29430dec1031
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78667
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Singer
2023-10-26 16:14:34 +02:00
committed by Felix Singer
parent ee1fd54aef
commit 983b169a36
8 changed files with 116 additions and 98 deletions
Download Patch File Download Diff File Expand all files Collapse all files

27
src/mainboard/system76/rpl/variants/addw3/overridetree.cb
View File

@@ -8,18 +8,21 @@ chip soc/intel/alderlake
#TODO: DDIB and DDID are both connected to TBT #TODO: DDIB and DDID are both connected to TBT
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A 3.2 Gen 1 (Left) [0] = USB2_PORT_MID(OC_SKIP), /* Type-A 3.2 Gen 1 (Left) */
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A 2.0 (Left) [1] = USB2_PORT_MID(OC_SKIP), /* Type-A 2.0 (Left) */
# Port reset messaging cannot be used, so do not use USB2_PORT_TYPE_C for these /* Port reset messaging cannot be used,
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-C 3.2 Gen 2 (Rear) * so do not use USB2_PORT_TYPE_C for these */
register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Type-C Thunderbolt (Right) [2] = USB2_PORT_MID(OC_SKIP), /* Type-C 3.2 Gen 2 (Rear) */
register "usb2_ports[10]" = "USB2_PORT_MID(OC_SKIP)" # Camera [8] = USB2_PORT_MID(OC_SKIP), /* Type-C Thunderbolt (Right) */
register "usb2_ports[11]" = "USB2_PORT_MID(OC_SKIP)" # Secure Pad [10] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[13]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [11] = USB2_PORT_MID(OC_SKIP), /* Secure Pad */
# USB3 [13] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A 3.2 Gen 1 (Left) }"
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C 3.2 Gen 2 (Rear) register "usb3_ports" = "{
[0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A 3.2 Gen 1 (Left) */
[2] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-C 3.2 Gen 2 (Rear) */
}"
end end
device ref i2c0 on device ref i2c0 on

27
src/mainboard/system76/rpl/variants/bonw15/overridetree.cb
View File

@@ -6,18 +6,21 @@ chip soc/intel/alderlake
subsystemid 0x1558 0x3702 inherit subsystemid 0x1558 0x3702 inherit
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A 3.2 Gen 2 (Left, Front) [0] = USB2_PORT_MID(OC_SKIP), /* Type-A 3.2 Gen 2 (Left, Front) */
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A 3.2 Gen 2 (Left, Rear) [1] = USB2_PORT_MID(OC_SKIP), /* Type-A 3.2 Gen 2 (Left, Rear) */
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera [5] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Per-key RGB [6] = USB2_PORT_MID(OC_SKIP), /* Per-key RGB */
# Port reset messaging cannot be used, so do not use USB2_PORT_TYPE_C for these /* Port reset messaging cannot be used,
register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Type-C Thunderbolt (Right, Front) * so do not use USB2_PORT_TYPE_C for these */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Type-C Thunderbolt with PD (Right, Rear) [8] = USB2_PORT_MID(OC_SKIP), /* Type-C Thunderbolt (Right, Front) */
register "usb2_ports[13]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Type-C Thunderbolt with PD (Right, Rear) */
# USB3 [13] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A 3.2 Gen 2 (Left, Front) }"
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A 3.2 Gen 2 (Left, Rear) register "usb3_ports" = "{
[0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A 3.2 Gen 2 (Left, Front) */
[2] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A 3.2 Gen 2 (Left, Rear) */
}"
end end
device ref i2c0 on device ref i2c0 on

26
src/mainboard/system76/rpl/variants/darp9/overridetree.cb
View File

@@ -29,18 +29,20 @@ chip soc/intel/alderlake
end end
device ref tcss_dma0 on end device ref tcss_dma0 on end
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A [0] = USB2_PORT_MID(OC_SKIP), /* Type-A */
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A [1] = USB2_PORT_MID(OC_SKIP), /* Type-A */
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1 (USB-C) [2] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 (USB-C) */
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint [4] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */
register "usb2_ports[5]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC2 (Thunderbolt) [5] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC2 (Thunderbolt) */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Camera [6] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A register "usb3_ports" = "{
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 CH0 [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A */
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 CH1 [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 CH0 */
[2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 CH1 */
}"
end end
device ref i2c0 on device ref i2c0 on
# Touchpad I2C bus # Touchpad I2C bus

26
src/mainboard/system76/rpl/variants/galp7/overridetree.cb
View File

@@ -21,18 +21,20 @@ chip soc/intel/alderlake
end end
device ref tcss_dma0 on end device ref tcss_dma0 on end
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # J_USB3_2 (USB 3.2 Gen1) [0] = USB2_PORT_MID(OC_SKIP), /* J_USB3_2 (USB 3.2 Gen1) */
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1 (USB 3.2 Gen2) [1] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 (USB 3.2 Gen2) */
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # J_USB3_1 (USB 3.2 Gen1) [2] = USB2_PORT_MID(OC_SKIP), /* J_USB3_1 (USB 3.2 Gen1) */
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint [4] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */
register "usb2_ports[5]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC2 (Thunerbolt) [5] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC2 (Thunerbolt) */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Camera [6] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB3_2 (USB 3.2 Gen1) register "usb3_ports" = "{
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB3_1 (USB 3.2 Gen1) [0] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB3_2 (USB 3.2 Gen1) */
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 (USB 3.2 Gen2) [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB3_1 (USB 3.2 Gen1) */
[3] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 (USB 3.2 Gen2) */
}"
end end
device ref i2c0 on device ref i2c0 on
# Touchpad I2C bus # Touchpad I2C bus

28
src/mainboard/system76/rpl/variants/gaze18/overridetree.cb
View File

@@ -3,19 +3,21 @@ chip soc/intel/alderlake
subsystemid 0x1558 0x5630 inherit subsystemid 0x1558 0x5630 inherit
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # J_TYPEC1 (USB 3.1 Gen2) [2] = USB2_PORT_MID(OC_SKIP), /* J_TYPEC1 (USB 3.1 Gen2) */
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Type-A (USB 3.1 Gen2) [4] = USB2_PORT_MID(OC_SKIP), /* Type-A (USB 3.1 Gen2) */
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # J_TYPEC2 (USB 3.1 Gen2) [5] = USB2_PORT_MID(OC_SKIP), /* J_TYPEC2 (USB 3.1 Gen2) */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Finger [6] = USB2_PORT_MID(OC_SKIP), /* Finger */
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera [7] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Type-A [8] = USB2_PORT_MID(OC_SKIP), /* Type-A */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A (USB 3.1 Gen2) register "usb3_ports" = "{
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC2 [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A (USB 3.1 Gen2) */
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC2 */
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 */
[3] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 */
}"
end end
device ref i2c0 on device ref i2c0 on

24
src/mainboard/system76/rpl/variants/lemp12/overridetree.cb
View File

@@ -13,17 +13,19 @@ chip soc/intel/alderlake
end end
device ref tcss_dma0 on end device ref tcss_dma0 on end
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Left [0] = USB2_PORT_MID(OC_SKIP), /* Type-A Left */
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Right [1] = USB2_PORT_MID(OC_SKIP), /* Type-A Right */
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1 [2] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 */
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # 3G/LTE [3] = USB2_PORT_MID(OC_SKIP), /* 3G/LTE */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Camera [6] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Left register "usb3_ports" = "{
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Right [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A Left */
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # 3G/LTE [1] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A Right */
[3] = USB3_PORT_DEFAULT(OC_SKIP), /* 3G/LTE */
}"
end end
device ref i2c0 on device ref i2c0 on

28
src/mainboard/system76/rpl/variants/oryp11/overridetree.cb
View File

@@ -8,19 +8,21 @@ chip soc/intel/alderlake
end end
device ref tcss_dma0 on end device ref tcss_dma0 on end
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # AJ_USB1: USB-A 3.2 Gen 1 (Left) [0] = USB2_PORT_MID(OC_SKIP), /* AJ_USB1: USB-A 3.2 Gen 1 (Left) */
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1: USB-C Thunderbolt (Right) [1] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1: USB-C Thunderbolt (Right) */
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC2: USB-C 3.2 Gen 2 (Back) [2] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC2: USB-C 3.2 Gen 2 (Back) */
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Per-key RGB [4] = USB2_PORT_MID(OC_SKIP), /* Per-key RGB */
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # J_USB1: USB-A 3.2 Gen 1 (Right) [5] = USB2_PORT_MID(OC_SKIP), /* J_USB1: USB-A 3.2 Gen 1 (Right) */
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera [7] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # AJ_USB1: USB-A 3.2 Gen 1 (Left) register "usb3_ports" = "{
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB1: USB-A 3.2 Gen 1 (Right) [0] = USB3_PORT_DEFAULT(OC_SKIP), /* AJ_USB1: USB-A 3.2 Gen 1 (Left) */
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC2: USB-C 3.2 Gen 2 (Back) [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB1: USB-A 3.2 Gen 1 (Right) */
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC2: USB-C 3.2 Gen 2 (Back) [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC2: USB-C 3.2 Gen 2 (Back) */
[3] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC2: USB-C 3.2 Gen 2 (Back) */
}"
end end
device ref i2c0 on device ref i2c0 on

28
src/mainboard/system76/rpl/variants/serw13/overridetree.cb
View File

@@ -6,19 +6,21 @@ chip soc/intel/alderlake
subsystemid 0x1558 0xd502 inherit subsystemid 0x1558 0xd502 inherit
device ref xhci on device ref xhci on
# USB2 register "usb2_ports" = "{
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # TYPEC2 (USB 3.1 Gen2 + DP 1.4 HBR3) [0] = USB2_PORT_MID(OC_SKIP), /* TYPEC2 (USB 3.1 Gen2 + DP 1.4 HBR3) */
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # AJ_USB1 (USB 3.2 Gen2) [1] = USB2_PORT_MID(OC_SKIP), /* AJ_USB1 (USB 3.2 Gen2) */
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # AJ_USB2 (USB 3.2 Gen2 + charger) [2] = USB2_PORT_MID(OC_SKIP), /* AJ_USB2 (USB 3.2 Gen2 + charger) */
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Per-KB [5] = USB2_PORT_MID(OC_SKIP), /* Per-KB */
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint [6] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera [7] = USB2_PORT_MID(OC_SKIP), /* Camera */
register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # TBT USB2.0 [8] = USB2_PORT_MID(OC_SKIP), /* TBT USB2.0 */
register "usb2_ports[13]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth [13] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
# USB3 }"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPEC2 (USB 3.1 Gen2 + DP 1.4 HBR3) register "usb3_ports" = "{
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # AJ_USB1 (USB 3.2 Gen2) [0] = USB3_PORT_DEFAULT(OC_SKIP), /* TYPEC2 (USB 3.1 Gen2 + DP 1.4 HBR3) */
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # AJ_USB2 (USB 3.2 Gen2 + charger) [1] = USB3_PORT_DEFAULT(OC_SKIP), /* AJ_USB1 (USB 3.2 Gen2) */
[2] = USB3_PORT_DEFAULT(OC_SKIP), /* AJ_USB2 (USB 3.2 Gen2 + charger) */
}"
end end
device ref i2c0 on device ref i2c0 on