mb/siemens/chili: Use CHIPSET_LOCKDOWN_COREBOOT

Currently, internal flashing is not possible due to FSP lockdown. Thus
let coreboot do chipset lockdown.

Change-Id: Iee4f6986e5edfe1bf6c84fe132bcb47b15bb81f5
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56198
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/siemens/chili/variants/base/devicetree.cb

@@ -8,6 +8,10 @@ chip soc/intel/cannonlake
 	register "PchHdaDspEnable" = "0"
         register "PchHdaAudioLinkHda" = "1"
 
+	register "common_soc_config" = "{
+		.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+	}"
+
 	device cpu_cluster 0 on
 		device lapic 0 on end
 	end

src/mainboard/siemens/chili/variants/chili/devicetree.cb

@@ -8,6 +8,10 @@ chip soc/intel/cannonlake
 	register "PchHdaDspEnable" = "0"
         register "PchHdaAudioLinkHda" = "1"
 
+	register "common_soc_config" = "{
+		.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+	}"
+
 	device cpu_cluster 0 on
 		device lapic 0 on end
 	end