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superio/nuvoton: remove LDN-specific ops overrides

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The pnp ops struct is already passed to the pnp_enable_devices function and it
is used if no override is supplied in the elements of the pnp_info struct array

Change-Id: I18345d7cc50a7d46cb15584dfb54df28e8534f81
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/27386
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Felix Held
2018-07-06 20:55:53 +02:00
parent ad417c9c7b
commit 9911d64b9e
7 changed files with 132 additions and 127 deletions
Download Patch File Download Diff File Expand all files Collapse all files

26
src/superio/nuvoton/npcd378/superio.c
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@@ -111,30 +111,30 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, NPCD378_FDC, PNP_IO0|PNP_IRQ0|PNP_DRQ0, 0x0ff8, },
{ &ops, NPCD378_PP, PNP_IO0|PNP_IRQ0|PNP_DRQ0, 0x0ff8, },
{ &ops, NPCD378_SP1, PNP_IO0|PNP_IRQ0, 0x0ff8, },
{ &ops, NPCD378_SP2, PNP_IO0|PNP_IRQ0, 0x0ff8, },
{ &ops, NPCD378_PWR, PNP_IO0|PNP_IO1|PNP_IRQ0|PNP_MSC0|
{ NULL, NPCD378_FDC, PNP_IO0|PNP_IRQ0|PNP_DRQ0, 0x0ff8, },
{ NULL, NPCD378_PP, PNP_IO0|PNP_IRQ0|PNP_DRQ0, 0x0ff8, },
{ NULL, NPCD378_SP1, PNP_IO0|PNP_IRQ0, 0x0ff8, },
{ NULL, NPCD378_SP2, PNP_IO0|PNP_IRQ0, 0x0ff8, },
{ NULL, NPCD378_PWR, PNP_IO0|PNP_IO1|PNP_IRQ0|PNP_MSC0|
PNP_MSC1|PNP_MSC2|PNP_MSC3|PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|
PNP_MSC8|PNP_MSC9|PNP_MSCA|PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE,
0x0ff8, 0x0ff8},
{ &ops, NPCD378_AUX, PNP_IRQ0, 0x0fff, 0x0fff, },
{ &ops, NPCD378_KBC, PNP_IO0|PNP_IO1|PNP_IRQ0,
{ NULL, NPCD378_AUX, PNP_IRQ0, 0x0fff, 0x0fff, },
{ NULL, NPCD378_KBC, PNP_IO0|PNP_IO1|PNP_IRQ0,
0x0fff, 0x0fff, },
{ &ops, NPCD378_WDT1, PNP_IO0|PNP_MSC8|PNP_MSC9|
{ NULL, NPCD378_WDT1, PNP_IO0|PNP_MSC8|PNP_MSC9|
PNP_MSCA|PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE, 0x0ff8},
{ &ops, NPCD378_HWM, PNP_IO0|PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|
{ NULL, NPCD378_HWM, PNP_IO0|PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|
PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|PNP_IRQ0, 0x0ff8},
{ &ops, NPCD378_GPIO_PP_OD, PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|
{ NULL, NPCD378_GPIO_PP_OD, PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|
PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|PNP_MSC8|PNP_MSC9|PNP_MSCA|
PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE},
{ &ops, NPCD378_I2C, PNP_IO0|PNP_IO1|PNP_IRQ0|PNP_MSC0|
{ NULL, NPCD378_I2C, PNP_IO0|PNP_IO1|PNP_IRQ0|PNP_MSC0|
PNP_MSC1|PNP_MSC2|PNP_MSC3|PNP_MSC4|PNP_MSC5|PNP_MSC6|PNP_MSC7|
PNP_MSC8|PNP_MSC9|PNP_MSCA|PNP_MSCB|PNP_MSCC|PNP_MSCD|PNP_MSCE,
0x0ff8, 0x0ff8},
{ &ops, NPCD378_SUSPEND, PNP_IO0, 0x0ff8 },
{ &ops, NPCD378_GPIOA, PNP_IO0|PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|
{ NULL, NPCD378_SUSPEND, PNP_IO0, 0x0ff8 },
{ NULL, NPCD378_GPIOA, PNP_IO0|PNP_MSC0|PNP_MSC1|PNP_MSC2|PNP_MSC3|
PNP_MSC4, 0x0ff8},
};