arch/x86: Move TSEG_STAGE_CACHE implementation

This is declared weak so that platforms that do not
have smm_subregion() can provide their own implementation.

Change-Id: Ide815b45cbc21a295b8e58434644e82920e84e31
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34704
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

src/cpu/x86/smm/Makefile.inc

@@ -42,6 +42,10 @@ endif
 
 ifeq ($(CONFIG_SMM_TSEG),y)
 
+ramstage-y += stage_cache.c
+romstage-y += stage_cache.c
+postcar-y += stage_cache.c
+
 smmstub-y += smm_stub.S
 
 smm-y += smm_module_handler.c

src/cpu/x86/smm/stage_cache.c

@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <stage_cache.h>
+#include <types.h>
+
+int __weak smm_subregion(int sub, void **base, size_t *size)
+{
+	return -1;
+}
+
+void __weak stage_cache_external_region(void **base, size_t *size)
+{
+	if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) {
+		printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
+		*base = NULL;
+		*size = 0;
+	}
+}