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intel/baytrail: Spelling fixes

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Change-Id: Ideb58634a029d55746421ad1ea4b80811bca403c
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7705
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Martin Roth
2014-12-07 14:57:26 -07:00
committed by Martin Roth
parent 7c96629e94
commit 99a3bba171
10 changed files with 14 additions and 14 deletions
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4
src/soc/intel/baytrail/southcluster.c
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@@ -158,7 +158,7 @@ static void com1_configure_resume(device_t dev)
{
const uint16_t port = 0x3f8;
/* Is the UART I/O port eanbled? */
/* Is the UART I/O port enabled? */
if (!(pci_read_config32(dev, UART_CONT) & 1))
return;
@@ -223,7 +223,7 @@ static void sc_init(device_t dev)
* Common code for the south cluster devices.
*/
/* Set bit in function disble register to hide this device. */
/* Set bit in function disable register to hide this device. */
static void sc_disable_devfn(device_t dev)
{
const unsigned long func_dis = PMC_BASE_ADDRESS + FUNC_DIS;