Update equivalent processor revision ID to load latest microcode patches and

register setting for all FAM10 processors.
This does not include new errata for FAM10 C2.

Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Vincent Lim (vincent.lim@amd.com)



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4288 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/northbridge/amd/amdfam10/raminit_amdmct.c

@@ -149,6 +149,9 @@ u32 mctGetLogicalCPUID(u32 Node)
 	case 0x10023:
 		ret = AMD_DR_B3;
 		break;
+	case 0x10062:
+		ret = AMD_RB_C2;
+		break;
 	default:
 		/* FIXME: mabe we should die() here. */
 		print_err("FIXME! CPU Version unknown or not supported! \n");

src/northbridge/amd/amdmct/amddefs.h

@@ -40,6 +40,7 @@
 #define	AMD_DR_B2	0x00200000	/* Barcelona B2 */
 #define	AMD_DR_BA	0x00400000	/* Barcelona BA */
 #define	AMD_DR_B3	0x00800000	/* Barcelona B3 */
+#define	AMD_RB_C2	0x01000000	/* Shanghai C2 */
 
 /*
  * Groups - Create as many as you wish, from the above public values
@@ -57,6 +58,8 @@
 #define	AMD_DR_LT_B3	(AMD_DR_B0 | AMD_DR_B1 | AMD_DR_B2 | AMD_DR_BA)
 #define	AMD_DR_GT_B0	(AMD_DR_ALL & ~(AMD_DR_B0))
 #define	AMD_DR_ALL	(AMD_DR_Bx)
+#define	AMD_FAM10_ALL	(AMD_DR_ALL | AMD_RB_C2)
+#define	AMD_FAM10_GT_B0	(AMD_FAM10_ALL & ~(AMD_DR_B0))
 
 /*
  *  Public Platforms - USE THESE VERSIONS TO MAKE COMPARE WITH CPUPLATFORMTYPE RETURN VALUE