sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/phoenix: Hook up xhci ops in chipset.cb

Browse Source 
Hook up xhci ops for Phoenix xHCI device. Benefit is we don't have to
bother by adding xhci DID.

BUG=b:285981912
TEST=check coreboot log shows below.
[INFO ]  \_SB.PCI0.GP41.XHC0.RHUB.SS01: USB3 Type-A Port A0 (MLB)

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: Ib59874948725966b04b54def3f6de463afeda709
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75659
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Eric Lai
2023-06-06 15:01:02 +08:00
committed by Felix Held
parent 2813c7c10c
commit 9a070dc746
2 changed files with 6 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/drivers/usb/pci_xhci/pci_xhci.c
View File

@@ -12,7 +12,7 @@
#define PCI_XHCI_CLASSCODE 0x0c0330 /* USB3.0 xHCI controller */
static unsigned int controller_count;
static const struct device_operations xhci_pci_ops;
const struct device_operations xhci_pci_ops;
struct port_counts {
unsigned int high_speed;
@@ -240,7 +240,7 @@ static void xhci_enable(struct device *dev)
dev->name = name;
}
static const struct device_operations xhci_pci_ops = {
const struct device_operations xhci_pci_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,