ChromeOS: Replace with or add <types.h>

It's commented in <types.h> that it shall provide <commonlib/helpers.h>.

Fix for ARRAY_SIZE() in bulk, followup works will reduce the number
of other includes these files have.

Change-Id: I2572aaa2cf4254f0dea6698cba627de12725200f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58996
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

src/mainboard/amd/majolica/chromeos.c

@@ -3,6 +3,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/emulation/qemu-q35/chromeos.c

@@ -2,6 +2,7 @@
 
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/google/auron/chromeos.c

@@ -2,6 +2,7 @@
 
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <soc/chromeos.h>
 #include <southbridge/intel/lynxpoint/lp_gpio.h>

src/mainboard/google/beltino/chromeos.c

@@ -6,6 +6,7 @@
 #include <device/device.h>
 #include <southbridge/intel/lynxpoint/pch.h>
 #include <southbridge/intel/common/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 #define GPIO_SPI_WP	58

src/mainboard/google/brya/chromeos.c

@@ -5,6 +5,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/google/brya/variants/baseboard/brask/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <soc/gpio.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 

src/mainboard/google/brya/variants/baseboard/brya/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <soc/gpio.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 

src/mainboard/google/butterfly/chromeos.c

@@ -8,6 +8,7 @@
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <ec/quanta/ene_kb3940q/ec.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include "ec.h"
 

src/mainboard/google/cyan/chromeos.c

@@ -5,6 +5,7 @@
 #include <device/mmio.h>
 #include <gpio.h>
 #include <soc/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* The WP status pin lives on MF_ISH_GPIO_4 */

src/mainboard/google/daisy/chromeos.c

@@ -5,6 +5,7 @@
 #include <ec/google/chromeec/ec_commands.h>
 #include <soc/cpu.h>
 #include <soc/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <bootmode.h>
 

src/mainboard/google/dedede/chromeos.c

@@ -5,6 +5,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/google/dedede/variants/baseboard/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* Pad configuration in ramstage*/

src/mainboard/google/deltaur/chromeos.c

@@ -8,6 +8,7 @@
 #include <gpio.h>
 #include <soc/gpio.h>
 #include <variant/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <security/tpm/tss.h>
 #include <device/device.h>

src/mainboard/google/drallion/chromeos.c

@@ -6,6 +6,7 @@
 #include <gpio.h>
 #include <soc/gpio.h>
 #include <variant/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <security/tpm/tss.h>
 #include <device/device.h>

src/mainboard/google/eve/chromeos.c

@@ -4,6 +4,7 @@
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <soc/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 #include "gpio.h"

src/mainboard/google/fizz/chromeos.c

@@ -5,6 +5,7 @@
 #include <gpio.h>
 #include <baseboard/variants.h>
 #include <soc/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 #include <variant/gpio.h>

src/mainboard/google/fizz/variants/baseboard/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* Pad configuration in ramstage */

src/mainboard/google/glados/chromeos.c

@@ -4,6 +4,7 @@
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <soc/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <variant/gpio.h>
 

src/mainboard/google/guybrush/chromeos.c

@@ -4,6 +4,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/google/hatch/chromeos.c

@@ -7,6 +7,7 @@
 #include <ec/google/chromeec/ec.h>
 #include <gpio.h>
 #include <variant/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/google/hatch/variants/baseboard/gpio.c

@@ -3,7 +3,7 @@
 #include <acpi/acpi.h>
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 static const struct pad_config gpio_table[] = {

src/mainboard/google/jecht/chromeos.c

@@ -4,6 +4,7 @@
 #include <boot/coreboot_tables.h>
 #include <device/pci_ops.h>
 #include <device/device.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <ec/google/chromeec/ec.h>
 #include <soc/chromeos.h>

src/mainboard/google/kahlee/chromeos.c

@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>

src/mainboard/google/link/chromeos.c

@@ -4,6 +4,7 @@
 #include <boot/coreboot_tables.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/google/octopus/chromeos.c

@@ -5,6 +5,7 @@
 #include <boot/coreboot_tables.h>
 #include <ec/google/chromeec/ec.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <soc/gpio.h>
 #include <variant/gpio.h>

src/mainboard/google/octopus/variants/baseboard/gpio.c

@@ -3,7 +3,7 @@
 #include <acpi/acpi.h>
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /*

src/mainboard/google/parrot/chromeos.c

@@ -9,6 +9,7 @@
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <ec/compal/ene932/ec.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include "ec.h"
 

src/mainboard/google/peach_pit/chromeos.c

@@ -6,6 +6,7 @@
 #include <ec/google/chromeec/ec_commands.h>
 #include <soc/cpu.h>
 #include <soc/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/google/poppy/chromeos.c

@@ -6,6 +6,7 @@
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <soc/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 #include <variant/gpio.h>

src/mainboard/google/poppy/variants/baseboard/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* Pad configuration in ramstage */

src/mainboard/google/rambi/chromeos.c

@@ -3,6 +3,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <soc/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* The WP status pin lives on GPIO_SSUS_6 which is pad 36 in the SUS well. */

src/mainboard/google/reef/chromeos.c

@@ -4,6 +4,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <soc/gpio.h>
 #include <variant/gpio.h>

src/mainboard/google/reef/variants/baseboard/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /*

src/mainboard/google/reef/variants/coral/gpio.c

@@ -3,7 +3,7 @@
 #include <acpi/acpi.h>
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /*

src/mainboard/google/sarien/chromeos.c

@@ -6,6 +6,7 @@
 #include <gpio.h>
 #include <soc/gpio.h>
 #include <variant/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <security/tpm/tss.h>
 #include <device/device.h>

src/mainboard/google/slippy/chromeos.c

@@ -4,6 +4,7 @@
 #include <boot/coreboot_tables.h>
 #include <southbridge/intel/lynxpoint/pch.h>
 #include <southbridge/intel/common/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/google/stout/chromeos.c

@@ -8,6 +8,7 @@
 
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include "ec.h"
 #include <ec/quanta/it8518/ec.h>

src/mainboard/google/volteer/chromeos.c

@@ -5,6 +5,7 @@
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <variant/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/google/volteer/variants/baseboard/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* Pad configuration in ramstage */

src/mainboard/google/zork/chromeos.c

@@ -4,6 +4,7 @@
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <variant/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/intel/adlrvp/chromeos.c

@@ -5,6 +5,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/intel/adlrvp/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* Pad configuration in ramstage*/

src/mainboard/intel/baskingridge/chromeos.c

@@ -5,6 +5,7 @@
 #include <device/device.h>
 #include <southbridge/intel/lynxpoint/pch.h>
 #include <southbridge/intel/common/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/intel/coffeelake_rvp/chromeos.c

@@ -6,6 +6,7 @@
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <soc/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/intel/coffeelake_rvp/variants/baseboard/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 #if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)

src/mainboard/intel/emeraldlake2/chromeos.c

@@ -5,6 +5,7 @@
 #include <device/device.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/intel/glkrvp/chromeos.c

@@ -5,6 +5,7 @@
 #include <boot/coreboot_tables.h>
 #include <ec/google/chromeec/ec.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <soc/gpio.h>
 #include <variant/gpio.h>

src/mainboard/intel/glkrvp/variants/baseboard/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /*

src/mainboard/intel/icelake_rvp/chromeos.c

@@ -6,6 +6,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* Pad configuration in ramstage*/

src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* Pad configuration in ramstage*/

src/mainboard/intel/jasperlake_rvp/chromeos.c

@@ -5,6 +5,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* Pad configuration in ramstage*/

src/mainboard/intel/kblrvp/chromeos.c

@@ -6,6 +6,7 @@
 #include <gpio.h>
 #include <soc/gpio.h>
 #include <ec/google/chromeec/ec.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 #include "gpio.h"

src/mainboard/intel/kunimitsu/chromeos.c

@@ -4,6 +4,7 @@
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <soc/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include "gpio.h"
 

src/mainboard/intel/shadowmountain/chromeos.c

@@ -5,6 +5,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/intel/shadowmountain/variants/baseboard/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* Pad configuration in ramstage */

src/mainboard/intel/strago/chromeos.c

@@ -3,6 +3,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 #define WP_GPIO	GP_E_22

src/mainboard/intel/tglrvp/chromeos.c

@@ -5,6 +5,7 @@
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* Pad configuration in ramstage*/

src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c

@@ -2,7 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
-#include <commonlib/helpers.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* Pad configuration in ramstage*/

src/mainboard/intel/wtm2/chromeos.c

@@ -5,6 +5,7 @@
 #include <device/device.h>
 #include <soc/chromeos.h>
 #include <southbridge/intel/lynxpoint/lp_gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 /* Compile-time settings for recovery mode. */

src/mainboard/samsung/lumpy/chromeos.c

@@ -7,6 +7,7 @@
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 #define GPIO_SPI_WP	24

src/mainboard/samsung/stumpy/chromeos.c

@@ -6,6 +6,7 @@
 #include <device/device.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
+#include <types.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
 #define GPIO_SPI_WP	68