Allocating resource for Expansion ROM
More correct resource allocation for legacy VGA on K8 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@@ -37,6 +37,7 @@ static uint8_t pci_moving_config8(struct device *dev, unsigned reg)
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return ones ^ zeroes;
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}
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static uint16_t pci_moving_config16(struct device *dev, unsigned reg)
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{
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uint16_t value, ones, zeroes;
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@@ -153,8 +154,7 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
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*/
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if (moving == 0) {
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if (value != 0) {
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printk_debug(
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"%s register %02x(%08x), read-only ignoring it\n",
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printk_debug("%s register %02x(%08x), read-only ignoring it\n",
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dev_path(dev), index, value);
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}
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resource->flags = 0;
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@@ -233,11 +233,63 @@ static void pci_read_bases(struct device *dev, unsigned int howmany)
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compact_resources(dev);
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}
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static void pci_read_rom_resource(struct device *dev, unsigned long index)
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{
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struct resource *resource;
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unsigned long value, attr;
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resource_t moving, limit;
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/* Initialize the resources to nothing */
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resource = new_resource(dev, index);
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/* Get the initial value */
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value = pci_read_config32(dev, index);
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/* See which bits move */
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moving = pci_moving_config32(dev, index);
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/* clear the Enable bit */
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moving = moving & 0xffffffffe;
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/* Find the resource constraints.
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*
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* Start by finding the bits that move. From there:
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* - Size is the least significant bit of the bits that move.
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* - Limit is all of the bits that move plus all of the lower bits.
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* See PCI Spec 6.2.5.1 ...
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*/
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limit = 0;
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if (moving) {
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resource->size = 1;
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resource->align = resource->gran = 0;
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while(!(moving & resource->size)) {
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resource->size <<= 1;
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resource->align += 1;
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resource->gran += 1;
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}
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resource->limit = limit = moving | (resource->size - 1);
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printk_debug("%s, rom size: %x, limit: %x\n",
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dev_path(dev), resource->size, limit);
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}
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if (moving == 0) {
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if (value != 0) {
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printk_debug("%s register %02x(%08x), read-only ignoring it\n",
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dev_path(dev), index, value);
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}
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resource->flags = 0;
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} else {
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resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY;
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}
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compact_resources(dev);
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}
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static void pci_set_resource(struct device *dev, struct resource *resource);
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static void pci_record_bridge_resource(
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struct device *dev, resource_t moving,
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unsigned index, unsigned long mask, unsigned long type)
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static void pci_record_bridge_resource( struct device *dev, resource_t moving,
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unsigned index, unsigned long mask,
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unsigned long type)
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{
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/* Initiliaze the constraints on the current bus */
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struct resource *resource;
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@@ -272,7 +324,6 @@ static void pci_record_bridge_resource(
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return;
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}
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static void pci_bridge_read_bases(struct device *dev)
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{
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resource_t moving_base, moving_limit, moving;
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@@ -329,8 +380,7 @@ void pci_dev_read_resources(struct device *dev)
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pci_read_bases(dev, 6);
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addr = pci_read_config32(dev, PCI_ROM_ADDRESS);
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dev->rom_address = (addr == 0xffffffff)? 0 : addr;
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pci_read_rom_resource(dev, PCI_ROM_ADDRESS);
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}
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void pci_bus_read_resources(struct device *dev)
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@@ -340,8 +390,7 @@ void pci_bus_read_resources(struct device *dev)
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pci_bridge_read_bases(dev);
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pci_read_bases(dev, 2);
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addr = pci_read_config32(dev, PCI_ROM_ADDRESS1);
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dev->rom_address = (addr == 0xffffffff)? 0 : addr;
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pci_read_rom_resource(dev, PCI_ROM_ADDRESS1);
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}
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static void pci_set_resource(struct device *dev, struct resource *resource)
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@@ -18,7 +18,8 @@ struct bus *get_pbus_smbus(device_t dev)
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return pbus;
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}
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/*multi level i2c MUX??? may need to find the first i2c device and then set link down to current dev
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/*multi level i2c MUX??? may need to find the first i2c device and then set link
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* down to current dev
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1 store get_pbus_smbus list link
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2 reverse the link and call set link */
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@@ -424,6 +424,8 @@ static void amdk8_create_vga_resource(device_t dev, unsigned nodeid)
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{
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struct resource *resource;
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unsigned link;
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uint32_t base, limit;
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unsigned reg;
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for (link = 0; link < dev->links; link++) {
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if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
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printk_info("%s: bridge on link %d has VGA device\n",
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@@ -433,12 +435,29 @@ static void amdk8_create_vga_resource(device_t dev, unsigned nodeid)
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resource = amdk8_find_mempair(dev, nodeid, link);
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printk_info("MEM pair register %x\n", resource->index - 0x100);
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resource->base = 0xa0000;
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resource->size = 0x00000;
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resource->size = 0x20000;
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resource->gran = 16;
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resource->align = 16;
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resource->flags = IORESOURCE_PREFETCH | IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_ASSIGNED;
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resource->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_ASSIGNED;
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}
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}
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#if 1
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reg = resource->index & 0xfc;
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base = f1_read_config32(reg);
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limit = f1_read_config32(reg + 0x4);
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base &= 0x000000f0;
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base |= (resource->base >> 8) & 0xffffff00;
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base |= 3;
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limit &= 0x00000048;
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limit |= ((resource->base + resource->size) >> 8) & 0xffffff00;
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limit |= (resource->index & 3) << 4;
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limit |= (nodeid & 7);
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f1_write_config32(reg + 0x4, limit);
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f1_write_config32(reg, base);
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/* release the resource */
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resource->flags = 0;
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#endif
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}
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static void amdk8_set_resources(device_t dev)
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{
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