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new cache_as_ram support

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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Yinghai Lu
2006-04-03 20:38:34 +00:00
parent ffb7d8a31a
commit 9a791dffea
58 changed files with 2271 additions and 554 deletions
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14
src/devices/hypertransport.c
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@@ -424,17 +424,8 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
}
flags &= ~0x1f; /* mask out base Unit ID */
#if CK804_DEVN_BASE==0
if((dev->vendor == 0x10de) && (dev->device == 0x005e)) {
next_unitid = 0;
}
else {
#endif
flags |= next_unitid & 0x1f;
pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
#if CK804_DEVN_BASE==0
}
#endif
/* Update the Unitd id in the device structure */
static_count = 1;
@@ -473,11 +464,6 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
dev->vendor, dev->device,
(dev->enabled? "enabled": "disabled"), next_unitid);
#if CK804_DEVN_BASE==0
if ((dev->vendor == 0x10de) && (dev->device == 0x005e)) {
break; // CK804 can not change unitid, so it only can be alone in the link
}
#endif
} while((last_unitid != next_unitid) && (next_unitid <= (max_devfn >> 3)));
end_of_chain: