sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

acpi,soc: use is_domain0 function

Browse Source 
No need to open-code this when we have a function for this.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iae570ba750cb29456436349b4263808e2e410e2e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83643
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Felix Held
2024-07-24 23:58:07 +02:00
parent a17d22e51a
commit 9af1d3f857
4 changed files with 4 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/acpi/acpigen_pci_root_resource_producer.c
View File

@@ -60,7 +60,7 @@ void pci_domain_fill_ssdt(const struct device *domain)
acpigen_resource_producer_bus_number(domain->downstream->secondary, acpigen_resource_producer_bus_number(domain->downstream->secondary,
domain->downstream->max_subordinate); domain->downstream->max_subordinate);
if (domain->path.domain.domain == 0) { if (is_domain0(domain)) {
/* ACPI 6.4.2.5 I/O Port Descriptor */ /* ACPI 6.4.2.5 I/O Port Descriptor */
acpigen_write_io16(PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_LAST_PORT, 1, acpigen_write_io16(PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_LAST_PORT, 1,
PCI_IO_CONFIG_PORT_COUNT, 1); PCI_IO_CONFIG_PORT_COUNT, 1);

2
src/soc/amd/common/block/data_fabric/domain.c
View File

@@ -206,7 +206,7 @@ void amd_pci_domain_read_resources(struct device *domain)
read_non_pci_resources(domain, &idx); read_non_pci_resources(domain, &idx);
/* Only add the SoC's DRAM memory map and fixed resources once */ /* Only add the SoC's DRAM memory map and fixed resources once */
if (domain->path.domain.domain == 0) { if (is_domain0(domain)) {
add_pci_cfg_resources(domain, &idx); add_pci_cfg_resources(domain, &idx);
read_soc_memmap_resources(domain, &idx); read_soc_memmap_resources(domain, &idx);

3
src/soc/cavium/cn81xx/soc.c
View File

@@ -386,8 +386,7 @@ static struct device_operations soc_ops = {
static void enable_soc_dev(struct device *dev) static void enable_soc_dev(struct device *dev)
{ {
if (dev->path.type == DEVICE_PATH_DOMAIN && if (is_domain0(dev)) {
dev->path.domain.domain == 0) {
dev->ops = &pci_domain_ops_ecam0; dev->ops = &pci_domain_ops_ecam0;
} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
dev->ops = &soc_ops; dev->ops = &soc_ops;

2
src/soc/intel/xeon_sp/uncore_acpi.c
View File

@@ -560,7 +560,7 @@ unsigned long northbridge_write_acpi_tables(const struct device *device, unsigne
struct acpi_rsdp *rsdp) struct acpi_rsdp *rsdp)
{ {
/* Only write uncore ACPI tables for domain0 */ /* Only write uncore ACPI tables for domain0 */
if (device->path.domain.domain != 0) if (!is_domain0(device))
return current; return current;
acpi_srat_t *srat; acpi_srat_t *srat;