- Major cleanup of the bootpath
- Changes to allow more code to be compiled both ways - Working SMP support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Eric Biederman
@@ -72,5 +72,54 @@ int do_printk(int msg_level, const char *fmt, ...);
|
||||
#define printk_spew(fmt, arg...) do {} while(0)
|
||||
#endif
|
||||
|
||||
#define print_emerg(STR) printk_emerg ("%s", (STR))
|
||||
#define print_alert(STR) printk_alert ("%s", (STR))
|
||||
#define print_crit(STR) printk_crit ("%s", (STR))
|
||||
#define print_err(STR) printk_err ("%s", (STR))
|
||||
#define print_warning(STR) printk_warning("%s", (STR))
|
||||
#define print_notice(STR) printk_notice ("%s", (STR))
|
||||
#define print_info(STR) printk_info ("%s", (STR))
|
||||
#define print_debug(STR) printk_debug ("%s", (STR))
|
||||
#define print_spew(STR) printk_spew ("%s", (STR))
|
||||
|
||||
#define print_emerg_char(CH) printk_emerg ("%c", (CH))
|
||||
#define print_alert_char(CH) printk_alert ("%c", (CH))
|
||||
#define print_crit_char(CH) printk_crit ("%c", (CH))
|
||||
#define print_err_char(CH) printk_err ("%c", (CH))
|
||||
#define print_warning_char(CH) printk_warning("%c", (CH))
|
||||
#define print_notice_char(CH) printk_notice ("%c", (CH))
|
||||
#define print_info_char(CH) printk_info ("%c", (CH))
|
||||
#define print_debug_char(CH) printk_debug ("%c", (CH))
|
||||
#define print_spew_char(CH) printk_spew ("%c", (CH))
|
||||
|
||||
#define print_emerg_hex8(HEX) printk_emerg ("%08x", (HEX))
|
||||
#define print_alert_hex8(HEX) printk_alert ("%08x", (HEX))
|
||||
#define print_crit_hex8(HEX) printk_crit ("%08x", (HEX))
|
||||
#define print_err_hex8(HEX) printk_err ("%08x", (HEX))
|
||||
#define print_warning_hex8(HEX) printk_warning("%08x", (HEX))
|
||||
#define print_notice_hex8(HEX) printk_notice ("%08x", (HEX))
|
||||
#define print_info_hex8(HEX) printk_info ("%08x", (HEX))
|
||||
#define print_debug_hex8(HEX) printk_debug ("%08x", (HEX))
|
||||
#define print_spew_hex8(HEX) printk_spew ("%08x", (HEX))
|
||||
|
||||
#define print_emerg_hex16(HEX) printk_emerg ("%016x", (HEX))
|
||||
#define print_alert_hex16(HEX) printk_alert ("%016x", (HEX))
|
||||
#define print_crit_hex16(HEX) printk_crit ("%016x", (HEX))
|
||||
#define print_err_hex16(HEX) printk_err ("%016x", (HEX))
|
||||
#define print_warning_hex16(HEX) printk_warning("%016x", (HEX))
|
||||
#define print_notice_hex16(HEX) printk_notice ("%016x", (HEX))
|
||||
#define print_info_hex16(HEX) printk_info ("%016x", (HEX))
|
||||
#define print_debug_hex16(HEX) printk_debug ("%016x", (HEX))
|
||||
#define print_spew_hex16(HEX) printk_spew ("%016x", (HEX))
|
||||
|
||||
#define print_emerg_hex32(HEX) printk_emerg ("%032x", (HEX))
|
||||
#define print_alert_hex32(HEX) printk_alert ("%032x", (HEX))
|
||||
#define print_crit_hex32(HEX) printk_crit ("%032x", (HEX))
|
||||
#define print_err_hex32(HEX) printk_err ("%032x", (HEX))
|
||||
#define print_warning_hex32(HEX) printk_warning("%032x", (HEX))
|
||||
#define print_notice_hex32(HEX) printk_notice ("%032x", (HEX))
|
||||
#define print_info_hex32(HEX) printk_info ("%032x", (HEX))
|
||||
#define print_debug_hex32(HEX) printk_debug ("%032x", (HEX))
|
||||
#define print_spew_hex32(HEX) printk_spew ("%032x", (HEX))
|
||||
|
||||
#endif /* CONSOLE_CONSOLE_H_ */
|
||||
|
||||
@@ -76,13 +76,41 @@
|
||||
#define APIC_MODE_EXINT 0x7
|
||||
#define APIC_LVT1 0x360
|
||||
#define APIC_LVTERR 0x370
|
||||
#define APIC_TMICT 0x380
|
||||
#define APIC_TMCCT 0x390
|
||||
#define APIC_TDCR 0x3E0
|
||||
#define APIC_TDR_DIV_TMBASE (1<<2)
|
||||
#define APIC_TDR_DIV_1 0xB
|
||||
#define APIC_TDR_DIV_2 0x0
|
||||
#define APIC_TDR_DIV_4 0x1
|
||||
#define APIC_TDR_DIV_8 0x2
|
||||
#define APIC_TDR_DIV_16 0x3
|
||||
#define APIC_TDR_DIV_32 0x8
|
||||
#define APIC_TDR_DIV_64 0x9
|
||||
#define APIC_TDR_DIV_128 0xA
|
||||
|
||||
#if defined(__ROMCC__) || !defined(ASSEMBLY)
|
||||
|
||||
static inline unsigned long apic_read(unsigned long reg)
|
||||
{
|
||||
return *((volatile unsigned long *)(APIC_DEFAULT_BASE+reg));
|
||||
}
|
||||
|
||||
static inline void apic_write(unsigned long reg, unsigned long v)
|
||||
{
|
||||
*((volatile unsigned long *)(APIC_DEFAULT_BASE+reg)) = v;
|
||||
}
|
||||
|
||||
static inline void apic_wait_icr_idle(void)
|
||||
{
|
||||
do { } while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY );
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#if !defined(ASSEMBLY)
|
||||
|
||||
#include <console/console.h>
|
||||
|
||||
|
||||
#define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
|
||||
|
||||
struct __xchg_dummy { unsigned long a[100]; };
|
||||
@@ -119,25 +147,11 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
|
||||
}
|
||||
|
||||
|
||||
static inline unsigned long apic_read(unsigned long reg)
|
||||
{
|
||||
return *((volatile unsigned long *)(APIC_DEFAULT_BASE+reg));
|
||||
}
|
||||
|
||||
extern inline void apic_write_atomic(unsigned long reg, unsigned long v)
|
||||
{
|
||||
xchg((volatile unsigned long *)(APIC_DEFAULT_BASE+reg), v);
|
||||
}
|
||||
|
||||
static inline void apic_write(unsigned long reg, unsigned long v)
|
||||
{
|
||||
*((volatile unsigned long *)(APIC_DEFAULT_BASE+reg)) = v;
|
||||
}
|
||||
|
||||
static inline void apic_wait_icr_idle(void)
|
||||
{
|
||||
do { } while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY );
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_GOOD_APIC
|
||||
# define FORCE_READ_AROUND_WRITE 0
|
||||
|
||||
@@ -1,33 +1,101 @@
|
||||
#ifndef CPU_P6_MSR_H
|
||||
#define CPU_P6_MSR_H
|
||||
|
||||
/*
|
||||
* Access to machine-specific registers (available on 586 and better only)
|
||||
* Note: the rd* operations modify the parameters directly (without using
|
||||
* pointer indirection), this allows gcc to optimize better
|
||||
*/
|
||||
|
||||
#define rdmsr(msr,val1,val2) \
|
||||
__asm__ __volatile__("rdmsr" \
|
||||
: "=a" (val1), "=d" (val2) \
|
||||
: "c" (msr))
|
||||
#ifdef __ROMCC__
|
||||
|
||||
#define wrmsr(msr,val1,val2) \
|
||||
__asm__ __volatile__("wrmsr" \
|
||||
: /* no outputs */ \
|
||||
: "c" (msr), "a" (val1), "d" (val2))
|
||||
typedef __builtin_msr_t msr_t;
|
||||
|
||||
#define rdtsc(low,high) \
|
||||
__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
|
||||
static msr_t rdmsr(unsigned long index)
|
||||
{
|
||||
return __builtin_rdmsr(index);
|
||||
}
|
||||
|
||||
#define rdtscl(low) \
|
||||
__asm__ __volatile__ ("rdtsc" : "=a" (low) : : "edx")
|
||||
static void wrmsr(unsigned long index, msr_t msr)
|
||||
{
|
||||
__builtin_wrmsr(index, msr.lo, msr.hi);
|
||||
}
|
||||
|
||||
#define rdtscll(val) \
|
||||
__asm__ __volatile__ ("rdtsc" : "=A" (val))
|
||||
|
||||
#define rdpmc(counter,low,high) \
|
||||
__asm__ __volatile__("rdpmc" \
|
||||
: "=a" (low), "=d" (high) \
|
||||
: "c" (counter))
|
||||
struct tsc_struct {
|
||||
unsigned lo;
|
||||
unsigned hi;
|
||||
};
|
||||
typedef struct tsc_struct tsc_t;
|
||||
|
||||
static tsc_t rdtsc(void)
|
||||
{
|
||||
tsc_t res;
|
||||
asm ("rdtsc"
|
||||
: "=a" (res.lo), "=d"(res.hi) /* outputs */
|
||||
: /* inputs */
|
||||
: /* Clobbers */
|
||||
);
|
||||
return res;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef __GNUC__
|
||||
|
||||
typedef struct msr_struct
|
||||
{
|
||||
unsigned lo;
|
||||
unsigned hi;
|
||||
} msr_t;
|
||||
|
||||
static inline msr_t rdmsr(unsigned index)
|
||||
{
|
||||
msr_t result;
|
||||
__asm__ __volatile__ (
|
||||
"rdmsr"
|
||||
: "=a" (result.lo), "=d" (result.hi)
|
||||
: "c" (index)
|
||||
);
|
||||
return result;
|
||||
}
|
||||
|
||||
static inline void wrmsr(unsigned index, msr_t msr)
|
||||
{
|
||||
__asm__ __volatile__ (
|
||||
"wrmsr"
|
||||
: /* No outputs */
|
||||
: "c" (index), "a" (msr.lo), "d" (msr.hi)
|
||||
);
|
||||
}
|
||||
|
||||
typedef struct tsc_struct
|
||||
{
|
||||
unsigned lo;
|
||||
unsigned hi;
|
||||
} tsc_t;
|
||||
|
||||
static inline tsc_t rdtsc(void)
|
||||
{
|
||||
tsc_t result;
|
||||
__asm__ __volatile__(
|
||||
"rdtsc"
|
||||
: "=a" (result.lo), "=d" (result.hi)
|
||||
);
|
||||
return result;
|
||||
}
|
||||
|
||||
typedef struct pmc_struct
|
||||
{
|
||||
unsigned lo;
|
||||
unsigned hi;
|
||||
} pmc_t;
|
||||
|
||||
static inline pmc_t rdpmc(unsigned counter)
|
||||
{
|
||||
pmc_t result;
|
||||
__asm__ __volatile__(
|
||||
"rdpmc"
|
||||
: "=a" (result.lo), "=d" (result.hi)
|
||||
: "c" (counter)
|
||||
);
|
||||
return result;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* CPU_P6_MSR_H */
|
||||
|
||||
@@ -1,8 +1,11 @@
|
||||
#ifndef DELAY_H
|
||||
#define DELAY_H
|
||||
#ifndef __ROMCC__
|
||||
|
||||
void udelay(int usecs);
|
||||
void mdelay(int msecs);
|
||||
void delay(int secs);
|
||||
void init_timer(void);
|
||||
void udelay(unsigned usecs);
|
||||
void mdelay(unsigned msecs);
|
||||
void delay(unsigned secs);
|
||||
|
||||
#endif
|
||||
#endif /* DELAY_H */
|
||||
|
||||
58
src/include/device/pnp.h
Normal file
58
src/include/device/pnp.h
Normal file
@@ -0,0 +1,58 @@
|
||||
#ifndef DEVICE_PNP_H
|
||||
#define DEVICE_PNP_H
|
||||
|
||||
static inline void pnp_write_config(unsigned char port, unsigned char value, unsigned char reg)
|
||||
{
|
||||
outb(reg, port);
|
||||
outb(value, port +1);
|
||||
}
|
||||
|
||||
static inline unsigned char pnp_read_config(unsigned char port, unsigned char reg)
|
||||
{
|
||||
outb(reg, port);
|
||||
return inb(port +1);
|
||||
}
|
||||
|
||||
static inline void pnp_set_logical_device(unsigned char port, int device)
|
||||
{
|
||||
pnp_write_config(port, device, 0x07);
|
||||
}
|
||||
|
||||
static inline void pnp_set_enable(unsigned char port, int enable)
|
||||
{
|
||||
pnp_write_config(port, enable?0x1:0x0, 0x30);
|
||||
}
|
||||
|
||||
static inline int pnp_read_enable(unsigned char port)
|
||||
{
|
||||
return !!pnp_read_config(port, 0x30);
|
||||
}
|
||||
|
||||
static inline void pnp_set_iobase0(unsigned char port, unsigned iobase)
|
||||
{
|
||||
pnp_write_config(port, (iobase >> 8) & 0xff, 0x60);
|
||||
pnp_write_config(port, iobase & 0xff, 0x61);
|
||||
}
|
||||
|
||||
static inline void pnp_set_iobase1(unsigned char port, unsigned iobase)
|
||||
{
|
||||
pnp_write_config(port, (iobase >> 8) & 0xff, 0x62);
|
||||
pnp_write_config(port, iobase & 0xff, 0x63);
|
||||
}
|
||||
|
||||
static inline void pnp_set_irq0(unsigned char port, unsigned irq)
|
||||
{
|
||||
pnp_write_config(port, irq, 0x70);
|
||||
}
|
||||
|
||||
static inline void pnp_set_irq1(unsigned char port, unsigned irq)
|
||||
{
|
||||
pnp_write_config(port, irq, 0x72);
|
||||
}
|
||||
|
||||
static inline void pnp_set_drq(unsigned char port, unsigned drq)
|
||||
{
|
||||
pnp_write_config(port, drq & 0xff, 0x74);
|
||||
}
|
||||
|
||||
#endif /* DEVICE_PNP_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
#ifndef SMP_START_STOP_H
|
||||
#define SMP_START_STOP_H
|
||||
|
||||
#if SMP == 1
|
||||
#if CONFIG_SMP == 1
|
||||
#include <smp/atomic.h>
|
||||
unsigned long this_processors_id(void);
|
||||
int processor_index(unsigned long processor_id);
|
||||
|
||||
Reference in New Issue
Block a user