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Unify DIMM SPD addressing. For Geode, change the

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addressing scheme to match the rest of the tree
(0x50 instead of 0xa0).

abuild tested.

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi
2010-11-20 10:31:00 +00:00
committed by Patrick Georgi
parent 622824cadb
commit 9bd9a90d6a
47 changed files with 54 additions and 191 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/southbridge/amd/cs5536/cs5536_early_smbus.c
View File

@@ -165,7 +165,7 @@ static unsigned char do_smbus_read_byte(unsigned smbus_io_base,
goto err;
}
if ((smbus_send_slave_address(smbus_io_base, device))) {
if ((smbus_send_slave_address(smbus_io_base, device << 1))) {
error = 3;
goto err;
}
@@ -182,7 +182,7 @@ static unsigned char do_smbus_read_byte(unsigned smbus_io_base,
goto err;
}
if ((smbus_send_slave_address(smbus_io_base, device | 0x01))) {
if ((smbus_send_slave_address(smbus_io_base, (device << 1) | 0x01))) {
error = 6;
goto err;
}

1
src/southbridge/via/vt8231/vt8231_early_smbus.c
View File

@@ -16,7 +16,6 @@
/* Define register settings */
#define HOST_RESET 0xff
#define DIMM_BASE 0xa0 // 1010000 is base for DIMM in SMBus
#define READ_CMD 0x01 // 1 in the 0 bit of SMBHSTADD states to READ

1
src/southbridge/via/vt8235/vt8235_early_smbus.c
View File

@@ -16,7 +16,6 @@
/* Define register settings */
#define HOST_RESET 0xff
#define DIMM_BASE 0xa0 // 1010000 is base for DIMM in SMBus
#define READ_CMD 0x01 // 1 in the 0 bit of SMBHSTADD states to READ