- Updates to config.g so that it works more reliably and has initial support
for paths - Renamed some configuration variables SMP -> CONFIG_SMP MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS - Removed some dead configuration variables MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS SMP -> CONFIG_SMP FINAL_MAINBOARD_FIXUP SIO_BASE SIO_SYSTEM_CLK_INPUT NO_KEYBOARD USE_NORMAL_IMAGE SERIAL_CONSOLE USE_ELF_BOOT ENABLE_FIXED_AND_VARIABLE_MTRRS START_CPU_SEG DISABLE_WATCHDOG ENABLE_IOMMU AMD8111_DEV - Removed some assembly files that are no longer needed killed src/southbridge/amd/amd8111/smbus.inc killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc killed src/ram/ramtest.inc - Updates to config.g so that it works more reliably and has initial support for paths - Renamed some configuration variables SMP -> CONFIG_SMP MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS - Removed some dead configuration variables MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS SMP -> CONFIG_SMP FINAL_MAINBOARD_FIXUP SIO_BASE SIO_SYSTEM_CLK_INPUT NO_KEYBOARD USE_NORMAL_IMAGE SERIAL_CONSOLE USE_ELF_BOOT ENABLE_FIXED_AND_VARIABLE_MTRRS START_CPU_SEG DISABLE_WATCHDOG ENABLE_IOMMU AMD8111_DEV - Removed some assembly files that are no longer needed killed src/southbridge/amd/amd8111/smbus.inc killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc killed src/ram/ramtest.inc killed src/sdram/generic_dump_spd.inc killed src/sdram/generic_dump_spd.inc - Updated the arima/hdama to build with the new configuration system - Updated config.g to list all of the variables with make echo git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@@ -6,7 +6,6 @@ loadoptions
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target s2880
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uses AMD8111_DEV
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uses ARCH
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uses CONFIG_COMPRESS
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uses CONFIG_IOAPIC
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@@ -15,9 +14,7 @@ uses CONFIG_ROM_STREAM_START
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uses CONFIG_SMP
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uses CONFIG_UDELAY_TSC
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uses CPU_FIXUP
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uses ENABLE_FIXED_AND_VARIABLE_MTRRS
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uses FALLBACK_SIZE
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uses FINAL_MAINBOARD_FIXUP
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uses HAVE_FALLBACK_BOOT
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uses HAVE_MP_TABLE
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uses HAVE_PIRQ_TABLE
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@@ -31,7 +28,6 @@ uses k8
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uses MAINBOARD
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uses MAINBOARD_PART_NUMBER
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uses MAINBOARD_VENDOR
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uses MAX_CPUS
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#uses MEMORY_HOLE
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uses PAYLOAD_SIZE
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uses _RAMBASE
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@@ -40,12 +36,8 @@ uses ROM_IMAGE_SIZE
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uses ROM_SECTION_OFFSET
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uses ROM_SECTION_SIZE
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uses ROM_SIZE
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uses SIO_BASE
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uses SIO_SYSTEM_CLK_INPUT
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uses STACK_SIZE
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uses USE_ELF_BOOT
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uses USE_FALLBACK_IMAGE
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uses USE_NORMAL_IMAGE
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uses USE_OPTION_TABLE
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uses HAVE_OPTION_TABLE
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uses CONFIG_CHIP_CONFIGURE
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@@ -57,7 +49,7 @@ uses MAXIMUM_CONSOLE_LOGLEVEL
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uses DEBUG
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uses CONFIG_MAX_CPUS
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uses CONFIG_LOGICAL_CPUS
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uses MAX_PHYSICAL_CPUS
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uses CONFIG_MAX_PHYSICAL_CPUS
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uses LINUXBIOS_EXTRA_VERSION
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uses XIP_ROM_SIZE
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uses XIP_ROM_BASE
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@@ -97,10 +89,6 @@ option CONFIG_CHIP_CONFIGURE=1
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#option CONFIG_LSI_SCSI_FW_FIXUP=1
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### Customize our winbond superio chip for this motherboard
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###
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option SIO_BASE=0x2e
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option SIO_SYSTEM_CLK_INPUT=0
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#
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###
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### Build code to export a programmable irq routing table
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@@ -114,9 +102,8 @@ option IRQ_SLOT_COUNT=13
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###
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option CONFIG_SMP=1
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option CONFIG_MAX_CPUS=2
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option MAX_CPUS=2
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option CONFIG_LOGICAL_CPUS=0
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option MAX_PHYSICAL_CPUS=2
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option CONFIG_MAX_PHYSICAL_CPUS=2
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#
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###
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### Build code to setup a generic IOAPIC
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@@ -135,25 +122,11 @@ option CONFIG_IOAPIC=1
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#option MEMORY_HOLE=0
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#
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###
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### Enable both fixed and variable MTRRS
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### When we setup MTRRs in mtrr.c
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###
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### We must setup the fixed mtrrs or we confuse SMP secondary
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### processor identification
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###
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option ENABLE_FIXED_AND_VARIABLE_MTRRS=1
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#
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###
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### Clean up the motherboard id strings
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###
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option MAINBOARD_PART_NUMBER="S2880"
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option MAINBOARD_VENDOR="Tyan"
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#
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###
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### Call the final_mainboard_fixup function
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###
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option FINAL_MAINBOARD_FIXUP=1
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###
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### Compute the location and size of where this firmware image
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### (linuxBIOS plus bootloader) will live in the boot rom chip.
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@@ -174,9 +147,6 @@ option ROM_IMAGE_SIZE=65536
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## We do use compressed image
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option CONFIG_COMPRESS=1
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option USE_ELF_BOOT=1
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option CONFIG_CONSOLE_SERIAL8250=1
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option TTYS0_BAUD=115200
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@@ -200,8 +170,6 @@ option MAXIMUM_CONSOLE_LOGLEVEL=9
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option DEBUG=1
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option AMD8111_DEV=0x5
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#
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## LinuxBIOS C code runs at this location in RAM
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