soc/intel/apollolake: Hook up C1e to enhanced_cstates

Hook up C1e FSP S UPD which enables enhanced C-states, to
enhanced_cstates. This allows it to be enabled in the
devicetree with a value of "1" as the default is disabled.

C1e exists on both APL and GLK, and has been there since their
initial releases.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ie803a75ac9fb64a6c21b31baeea7b736e4fbf5fa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/soc/intel/apollolake/chip.c

@@ -717,6 +717,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
 
 	silconfig->VmxEnable = CONFIG(ENABLE_VMX);
 
+	/* Enable enhanced C-states */
+	silconfig->C1e = cfg->enhanced_cstates;
+
 	/* Set VTD feature according to devicetree */
 	silconfig->VtdEnable = get_uint_option("vtd", cfg->enable_vtd);
 

src/soc/intel/apollolake/chip.h

@@ -135,6 +135,9 @@ struct soc_intel_apollolake_config {
 	uint8_t hdaudio_pwr_gate_enable;
 	uint8_t hdaudio_bios_config_lockdown;
 
+	/* Enhanced C-states */
+	int enhanced_cstates;
+
 	/* SLP S3 minimum assertion width. */
 	int slp_s3_assertion_width_usecs;