diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c index 1b6e744c5a..56dc677d2c 100644 --- a/src/northbridge/intel/sandybridge/romstage.c +++ b/src/northbridge/intel/sandybridge/romstage.c @@ -16,6 +16,10 @@ #include #include +__weak void mainboard_early_init(int s3resume) +{ +} + __weak void mainboard_late_rcba_config(void) { } @@ -67,6 +71,8 @@ void mainboard_romstage_entry(void) post_code(0x38); + mainboard_early_init(s3resume); + post_code(0x39); if (CONFIG(INTEL_TXT)) {