tree/acpi: Replace constant "Zero" with actual number

Change-Id: I5a3e3506415f424bf0fdd48fc449520a76622af5 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71525 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-26 09:43:07 +01:00
parent 42efd7f593
commit 9df60d36b2
40 changed files with 106 additions and 106 deletions
--- a/src/soc/intel/alderlake/acpi/tcss_xhci.asl
+++ b/src/soc/intel/alderlake/acpi/tcss_xhci.asl
@@ -109,7 +109,7 @@ Method (_DSW, 3)
 */
 Device (RHUB)
 {
-	Name (_ADR, Zero)
+	Name (_ADR, 0)

 	/* High Speed Ports */
 	Device (HS01)
--- a/src/soc/intel/alderlake/acpi/xhci.asl
+++ b/src/soc/intel/alderlake/acpi/xhci.asl
@@ -27,7 +27,7 @@ Device (XHCI)
 	/* Root Hub for Alder Lake-P PCH */
 	Device (RHUB)
 	{
-		Name (_ADR, Zero)
+		Name (_ADR, 0)

 		/* USB2 */
 		Device (HS01) { Name (_ADR, 1) }
@@ -60,7 +60,7 @@ Device (XHCI)
 	/* Root Hub for Alder Lake-P PCH */
 	Device (RHUB)
 	{
-		Name (_ADR, Zero)
+		Name (_ADR, 0)

 		/* USB2 */
 		Device (HS01) { Name (_ADR, 1) }
--- a/src/soc/intel/apollolake/acpi/xhci.asl
+++ b/src/soc/intel/apollolake/acpi/xhci.asl
@@ -19,7 +19,7 @@ Device (XHCI) {
 	Device (RHUB)
 	{
 		/* Root Hub */
-		Name (_ADR, Zero)
+		Name (_ADR, 0)

 #if CONFIG(SOC_INTEL_GEMINILAKE)
 #include "xhci_glk_ports.asl"
--- a/src/soc/intel/baytrail/acpi/dptf/charger.asl
+++ b/src/soc/intel/baytrail/acpi/dptf/charger.asl
@@ -30,7 +30,7 @@ Device (TCHG)
 		Local0--

 		/* Check if charging is disabled (AC removed) */
-		If (\PWRS == Zero) {
+		If (\PWRS == 0) {
 			/* Return last power state */
 			Return (Local0)
 		} Else {
--- a/src/soc/intel/baytrail/acpi/irqlinks.asl
+++ b/src/soc/intel/baytrail/acpi/irqlinks.asl
@@ -28,7 +28,7 @@ Device (LNKA)
 		CreateWordField(RTLA, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTA */
 		IRQ0 = 1 << (PRTA & 0x0f)
@@ -87,7 +87,7 @@ Device (LNKB)
 		CreateWordField(RTLB, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTB */
 		IRQ0 = 1 << (PRTB & 0x0f)
@@ -146,7 +146,7 @@ Device (LNKC)
 		CreateWordField(RTLC, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTC */
 		IRQ0 = 1 << (PRTC & 0x0f)
@@ -205,7 +205,7 @@ Device (LNKD)
 		CreateWordField(RTLD, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTD */
 		IRQ0 = 1 << (PRTD & 0x0f)
@@ -264,7 +264,7 @@ Device (LNKE)
 		CreateWordField(RTLE, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTE */
 		IRQ0 = 1 << (PRTE & 0x0f)
@@ -323,7 +323,7 @@ Device (LNKF)
 		CreateWordField(RTLF, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTF */
 		IRQ0 = 1 << (PRTF & 0x0f)
@@ -382,7 +382,7 @@ Device (LNKG)
 		CreateWordField(RTLG, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTG */
 		IRQ0 = 1 << (PRTG & 0x0f)
@@ -441,7 +441,7 @@ Device (LNKH)
 		CreateWordField(RTLH, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTH */
 		IRQ0 = 1 << (PRTH & 0x0f)
--- a/src/soc/intel/baytrail/acpi/southcluster.asl
+++ b/src/soc/intel/baytrail/acpi/southcluster.asl
@@ -155,7 +155,7 @@ Method (_CRS, 0, Serialized)
 	CreateDWordField (MCRS, ^LMEM._MIN, LMIN)
 	CreateDWordField (MCRS, ^LMEM._MAX, LMAX)
 	CreateDWordField (MCRS, ^LMEM._LEN, LLEN)
-	If (LPFW != Zero && LPEN == 1)
+	If (LPFW != 0 && LPEN == 1)
 	{
 		LMIN = LPFW
 		LLEN = 0x00100000
@@ -163,9 +163,9 @@ Method (_CRS, 0, Serialized)
 	}
 	Else
 	{
-		LMIN = Zero
-		LMAX = Zero
-		LLEN = Zero
+		LMIN = 0
+		LMAX = 0
+		LLEN = 0
 	}

 	/* Update PCI resource area */
--- a/src/soc/intel/baytrail/acpi/xhci.asl
+++ b/src/soc/intel/baytrail/acpi/xhci.asl
@@ -17,7 +17,7 @@ Device (XHCI)
 			})

 			// REV: Revision 0x02 for ACPI 5.0
-			CreateField (DerefOf (PCKG[0]), Zero, 0x07, REV)
+			CreateField (DerefOf (PCKG[0]), 0, 0x07, REV)
 			REV = 0x02

 			// VISI: Port visibility to user per port
--- a/src/soc/intel/braswell/acpi/dptf/charger.asl
+++ b/src/soc/intel/braswell/acpi/dptf/charger.asl
@@ -30,7 +30,7 @@ Device (TCHG)
 		Local0--

 		/* Check if charging is disabled (AC removed) */
-		If (\_SB.PCI0.LPCB.EC0.ACEX == Zero) {
+		If (\_SB.PCI0.LPCB.EC0.ACEX == 0) {
 			/* Return last power state */
 			Return (Local0)
 		} Else {
--- a/src/soc/intel/braswell/acpi/irqlinks.asl
+++ b/src/soc/intel/braswell/acpi/irqlinks.asl
@@ -28,7 +28,7 @@ Device (LNKA)
 		CreateWordField(RTLA, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTA */
 		IRQ0 = 1 << (PRTA & 0x0f)
@@ -87,7 +87,7 @@ Device (LNKB)
 		CreateWordField(RTLB, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTB */
 		IRQ0 = 1 << (PRTB & 0x0f)
@@ -146,7 +146,7 @@ Device (LNKC)
 		CreateWordField(RTLC, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTC */
 		IRQ0 = 1 << (PRTC & 0x0f)
@@ -205,7 +205,7 @@ Device (LNKD)
 		CreateWordField(RTLD, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTD */
 		IRQ0 = 1 << (PRTD & 0x0f)
@@ -264,7 +264,7 @@ Device (LNKE)
 		CreateWordField(RTLE, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTE */
 		IRQ0 = 1 << (PRTE & 0x0f)
@@ -323,7 +323,7 @@ Device (LNKF)
 		CreateWordField(RTLF, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTF */
 		IRQ0 = 1 << (PRTF & 0x0f)
@@ -382,7 +382,7 @@ Device (LNKG)
 		CreateWordField(RTLG, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTG */
 		IRQ0 = 1 << (PRTG & 0x0f)
@@ -441,7 +441,7 @@ Device (LNKH)
 		CreateWordField(RTLH, 1, IRQ0)

 		/* Clear the WordField */
-		IRQ0 = Zero
+		IRQ0 = 0

 		/* Set the bit from PRTH */
 		IRQ0 = 1 << (PRTH & 0x0f)
--- a/src/soc/intel/braswell/acpi/scc.asl
+++ b/src/soc/intel/braswell/acpi/scc.asl
@@ -96,7 +96,7 @@ Device (PEMC)
 		Name (_ADR, 0x08)
 		Method (_RMV, 0, NotSerialized)
 		{
-			Return (Zero)
+			Return (0)
 		}
 	}
 }
--- a/src/soc/intel/braswell/acpi/southcluster.asl
+++ b/src/soc/intel/braswell/acpi/southcluster.asl
@@ -154,7 +154,7 @@ Method (_CRS, 0, Serialized)
 	CreateDWordField (MCRS, LMEM._MIN, LMIN)
 	CreateDWordField (MCRS, LMEM._MAX, LMAX)
 	CreateDWordField (MCRS, LMEM._LEN, LLEN)
-	If (LPFW != Zero && LPEN == 1)
+	If (LPFW != 0 && LPEN == 1)
 	{
 		LMIN = LPFW
 		LMAX = LMIN + 0x001FFFFF
@@ -162,9 +162,9 @@ Method (_CRS, 0, Serialized)
 	}
 	Else
 	{
-		LMIN = Zero
-		LMAX = Zero
-		LLEN = Zero
+		LMIN = 0
+		LMAX = 0
+		LLEN = 0
 	}

 	/* Update PCI resource area */
--- a/src/soc/intel/cannonlake/acpi/xhci.asl
+++ b/src/soc/intel/cannonlake/acpi/xhci.asl
@@ -48,7 +48,7 @@ Method (UWES, 3, Serialized)

 	While (1) {
 		FindSetRightBit (Local0, Local1)
-		If (Local1 == Zero) {
+		If (Local1 == 0) {
 			Break
 		}
 		UPWE (Local1, Arg1, Arg2)
@@ -102,7 +102,7 @@ Device (XHCI)
 	/* Root Hub for Cannonlake-LP PCH */
 	Device (RHUB)
 	{
-		Name (_ADR, Zero)
+		Name (_ADR, 0)

 		/* USB2 */
 		Device (HS01) { Name (_ADR, 1) }
--- a/src/soc/intel/common/acpi/wifi.asl
+++ b/src/soc/intel/common/acpi/wifi.asl
@@ -2,7 +2,7 @@

 Device (WIFI)
 {
-	Name (_ADR, Zero)
+	Name (_ADR, 0)
 	OperationRegion(WIXX, PCI_Config, 0x00, 0x10)
 	Name (WRDX, Package()
 	{
--- a/src/soc/intel/common/block/acpi/acpi/northbridge.asl
+++ b/src/soc/intel/common/block/acpi/acpi/northbridge.asl
@@ -5,8 +5,8 @@

 Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */)  // _HID: Hardware ID
 Name (_CID, EisaId ("PNP0A03") /* PCI Bus */)  // _CID: Compatible ID
-Name (_SEG, Zero)  // _SEG: PCI Segment
-Name (_UID, Zero)  // _UID: Unique ID
+Name (_SEG, 0)  // _SEG: PCI Segment
+Name (_UID, 0)  // _UID: Unique ID

 Device (MCHC)
 {
--- a/src/soc/intel/elkhartlake/acpi/pch_hda.asl
+++ b/src/soc/intel/elkhartlake/acpi/pch_hda.asl
@@ -31,12 +31,12 @@ Device (HDAS)
 			 * Function 0: Function Support Query
 			 * Returns a bitmask of functions supported.
 			 */
-			If (Arg2 == Zero) {
+			If (Arg2 == 0) {
 				/*
 				 * NHLT Query only supported for revision 1 and
 				 * if NHLT address and length are set in NVS.
 				 */
-				If ((Arg1 == 1) && ((NHLA != Zero) && (NHLL != Zero))) {
+				If ((Arg1 == 1) && ((NHLA != 0) && (NHLL != 0))) {
 					Return (Buffer (1) { 0x03 })
 				} Else {
 					Return (Buffer (1) { 0x01 })
--- a/src/soc/intel/elkhartlake/acpi/xhci.asl
+++ b/src/soc/intel/elkhartlake/acpi/xhci.asl
@@ -27,7 +27,7 @@ Device (XHCI)
 	/* Root Hub for Elkhartlake PCH */
 	Device (RHUB)
 	{
-		Name (_ADR, Zero)
+		Name (_ADR, 0)

 		/* USB2 */
 		Device (HS01) { Name (_ADR, 1) }
--- a/src/soc/intel/icelake/acpi/pch_hda.asl
+++ b/src/soc/intel/icelake/acpi/pch_hda.asl
@@ -31,12 +31,12 @@ Device (HDAS)
 			 * Function 0: Function Support Query
 			 * Returns a bitmask of functions supported.
 			 */
-			If (Arg2 == Zero) {
+			If (Arg2 == 0) {
 				/*
 				 * NHLT Query only supported for revision 1 and
 				 * if NHLT address and length are set in NVS.
 				 */
-				If (Arg1 == 1 && NHLA != Zero && NHLL != Zero) {
+				If (Arg1 == 1 && NHLA != 0 && NHLL != 0) {
 					Return (Buffer (1) { 0x03 })
 				} Else {
 					Return (Buffer (1) { 0x01 })
--- a/src/soc/intel/icelake/acpi/xhci.asl
+++ b/src/soc/intel/icelake/acpi/xhci.asl
@@ -27,7 +27,7 @@ Device (XHCI)
 	/* Root Hub for Icelake-LP PCH */
 	Device (RHUB)
 	{
-		Name (_ADR, Zero)
+		Name (_ADR, 0)

 		/* USB2 */
 		Device (HS01) { Name (_ADR, 1) }
--- a/src/soc/intel/jasperlake/acpi/pch_hda.asl
+++ b/src/soc/intel/jasperlake/acpi/pch_hda.asl
@@ -31,12 +31,12 @@ Device (HDAS)
 			 * Function 0: Function Support Query
 			 * Returns a bitmask of functions supported.
 			 */
-			If (Arg2 == Zero) {
+			If (Arg2 == 0) {
 				/*
 				 * NHLT Query only supported for revision 1 and
 				 * if NHLT address and length are set in NVS.
 				 */
-				If ((Arg1 == 1) && ((NHLA != Zero) && (NHLL != Zero))) {
+				If ((Arg1 == 1) && ((NHLA != 0) && (NHLL != 0))) {
 					Return (Buffer (1) { 0x03 })
 				} Else {
 					Return (Buffer (1) { 0x01 })
--- a/src/soc/intel/jasperlake/acpi/xhci.asl
+++ b/src/soc/intel/jasperlake/acpi/xhci.asl
@@ -27,7 +27,7 @@ Device (XHCI)
 	/* Root Hub for Jasperlake PCH */
 	Device (RHUB)
 	{
-		Name (_ADR, Zero)
+		Name (_ADR, 0)

 		/* USB2 */
 		Device (HS01) { Name (_ADR, 1) }
--- a/src/soc/intel/meteorlake/acpi/tcss_xhci.asl
+++ b/src/soc/intel/meteorlake/acpi/tcss_xhci.asl
@@ -103,7 +103,7 @@ Method (_DSW, 3)
 */
 Device (RHUB)
 {
-	Name (_ADR, Zero)
+	Name (_ADR, 0)

 	/* High Speed Ports */
 	Device (HS01)
--- a/src/soc/intel/meteorlake/acpi/xhci.asl
+++ b/src/soc/intel/meteorlake/acpi/xhci.asl
@@ -27,7 +27,7 @@ Device (XHCI)
 	/* Root Hub for Meteorlake */
 	Device (RHUB)
 	{
-		Name (_ADR, Zero)
+		Name (_ADR, 0)

 		/* USB2 */
 		Device (HS01) { Name (_ADR, 1) }
--- a/src/soc/intel/skylake/acpi/systemagent.asl
+++ b/src/soc/intel/skylake/acpi/systemagent.asl
@@ -5,8 +5,8 @@

 Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */)  // _HID: Hardware ID
 Name (_CID, EisaId ("PNP0A03") /* PCI Bus */)  // _CID: Compatible ID
-Name (_SEG, Zero)  // _SEG: PCI Segment
-Name (_UID, Zero)  // _UID: Unique ID
+Name (_SEG, 0)  // _SEG: PCI Segment
+Name (_UID, 0)  // _UID: Unique ID

 Device (MCHC)
 {
--- a/src/soc/intel/skylake/acpi/xhci.asl
+++ b/src/soc/intel/skylake/acpi/xhci.asl
@@ -46,7 +46,7 @@ Method (UWES, 3, Serialized)

 	While (1) {
 		FindSetRightBit (Local0, Local1)
-		If (Local1 == Zero) {
+		If (Local1 == 0) {
 			Break
 		}
 		UPWE (Local1, Arg1, Arg2)
@@ -209,7 +209,7 @@ Device (XHCI)
 	/* Root Hub for Skylake-LP PCH */
 	Device (RHUB)
 	{
-		Name (_ADR, Zero)
+		Name (_ADR, 0)

 		// GPLD: Generate Port Location Data (PLD)
 		Method (GPLD, 1, Serialized)
@@ -221,7 +221,7 @@ Device (XHCI)
 			})

 			// REV: Revision 0x02 for ACPI 5.0
-			CreateField (DerefOf (PCKG[0]), Zero, 0x07, REV)
+			CreateField (DerefOf (PCKG[0]), 0, 0x07, REV)
 			REV = 0x02

 			// VISI: Port visibility to user per port
--- a/src/soc/intel/tigerlake/acpi/tcss_xhci.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss_xhci.asl
@@ -109,7 +109,7 @@ Method (_DSW, 3)
 */
 Device (RHUB)
 {
-	Name (_ADR, Zero)
+	Name (_ADR, 0)

 	/* High Speed Ports */
 	Device (HS01)
--- a/src/soc/intel/tigerlake/acpi/xhci.asl
+++ b/src/soc/intel/tigerlake/acpi/xhci.asl
@@ -28,7 +28,7 @@ Device (XHCI)
 	/* Root Hub for Tigerlake-H PCH */
 	Device (RHUB)
 	{
-		Name (_ADR, Zero)
+		Name (_ADR, 0)

 		/* USB2 */
 		Device (HS01) { Name (_ADR, 1) }
@@ -62,7 +62,7 @@ Device (XHCI)
 	/* Root Hub for Tigerlake-LP PCH */
 	Device (RHUB)
 	{
-		Name (_ADR, Zero)
+		Name (_ADR, 0)

 		/* USB2 */
 		Device (HS01) { Name (_ADR, 1) }