sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/cannonlake, mb/google/sarien: Get rid of unused dev param

Browse Source 
This change gets rid of unused dev param to pmc_set_afterg3.

BUG=b:136861224

Change-Id: Ic197d6fb8618db15601096f5815e82efc2b539c1
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34117
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
This commit is contained in:
Furquan Shaikh
2019-07-06 22:54:53 -07:00
committed by Patrick Georgi
parent a913b3df90
commit 9eac4c9dda
3 changed files with 7 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/sarien/chromeos.c
View File

@@ -122,6 +122,6 @@ void mainboard_prepare_cr50_reset(void)
{ {
#if ENV_RAMSTAGE #if ENV_RAMSTAGE
/* Ensure system powers up after CR50 reset */ /* Ensure system powers up after CR50 reset */
pmc_set_afterg3(PCH_DEV_PMC, MAINBOARD_POWER_STATE_ON); pmc_set_afterg3(MAINBOARD_POWER_STATE_ON);
#endif #endif
} }

3
src/soc/intel/cannonlake/include/soc/pmc.h
View File

@@ -171,7 +171,6 @@
#define SCIS_IRQ22 6 #define SCIS_IRQ22 6
#define SCIS_IRQ23 7 #define SCIS_IRQ23 7
struct device; void pmc_set_afterg3(int s5pwr);
void pmc_set_afterg3(struct device *dev, int s5pwr);
#endif #endif

10
src/soc/intel/cannonlake/pmc.c
View File

@@ -32,7 +32,7 @@
* Set which power state system will be after reapplying * Set which power state system will be after reapplying
* the power (from G3 State) * the power (from G3 State)
*/ */
void pmc_set_afterg3(struct device *dev, int s5pwr) void pmc_set_afterg3(int s5pwr)
{ {
uint8_t reg8; uint8_t reg8;
uint8_t *pmcbase = pmc_mmio_regs(); uint8_t *pmcbase = pmc_mmio_regs();
@@ -60,7 +60,7 @@ void pmc_set_afterg3(struct device *dev, int s5pwr)
*/ */
void pmc_soc_restore_power_failure(void) void pmc_soc_restore_power_failure(void)
{ {
pmc_set_afterg3(PCH_DEV_PMC, CONFIG_MAINBOARD_POWER_FAILURE_STATE); pmc_set_afterg3(CONFIG_MAINBOARD_POWER_FAILURE_STATE);
} }
static void pm1_enable_pwrbtn_smi(void *unused) static void pm1_enable_pwrbtn_smi(void *unused)
@@ -119,7 +119,7 @@ static void config_deep_sx(uint32_t deepsx_config)
write32(pmcbase + DSX_CFG, reg); write32(pmcbase + DSX_CFG, reg);
} }
static void pch_power_options(struct device *dev) static void pch_power_options(void)
{ {
const char *state; const char *state;
@@ -144,7 +144,7 @@ static void pch_power_options(struct device *dev)
default: default:
state = "undefined"; state = "undefined";
} }
pmc_set_afterg3(dev, pwr_on); pmc_set_afterg3(pwr_on);
printk(BIOS_INFO, "Set power %s after power failure.\n", state); printk(BIOS_INFO, "Set power %s after power failure.\n", state);
/* Set up GPE configuration. */ /* Set up GPE configuration. */
@@ -159,7 +159,7 @@ static void pmc_init(void *unused)
rtc_init(); rtc_init();
/* Initialize power management */ /* Initialize power management */
pch_power_options(dev); pch_power_options();
config_deep_s3(config->deep_s3_enable_ac, config->deep_s3_enable_dc); config_deep_s3(config->deep_s3_enable_ac, config->deep_s3_enable_dc);
config_deep_s5(config->deep_s5_enable_ac, config->deep_s5_enable_dc); config_deep_s5(config->deep_s5_enable_ac, config->deep_s5_enable_dc);