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cpu/x86/lapic: Move LAPIC configuration to MP init

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Implementation for setup_lapic() did two things -- call
enable_lapic() and virtual_wire_mode_init().

In PARALLEL_MP case enable_lapic() was redundant as it
was already executed prior to initialize_cpu() call.
For the !PARALLEL_MP case enable_lapic() is added to
AP CPUs.

Change-Id: I5caf94315776a499e9cf8f007251b61f51292dc5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58387
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki
2021-10-17 08:34:31 +03:00
parent 7261b5ade5
commit 9ec7227c9b
42 changed files with 12 additions and 143 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/cpu/intel/common/common_init.c
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@@ -4,7 +4,6 @@
#include <arch/cpu.h>
#include <console/console.h>
#include <cpu/intel/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/msr.h>
#include "common.h"

3
src/cpu/intel/haswell/haswell_init.c
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@@ -7,7 +7,6 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mp.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/speedstep.h>
@@ -541,9 +540,7 @@ static void cpu_core_init(struct device *cpu)
/* Clear out pending MCEs */
configure_mca();
/* Enable the local CPU APICs */
enable_lapic_tpr();
setup_lapic();
/* Set virtualization based on Kconfig option */
set_vmx_and_lock();

4
src/cpu/intel/model_1067x/model_1067x_init.c
View File

@@ -4,7 +4,6 @@
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/speedstep.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
@@ -256,9 +255,6 @@ static void model_1067x_init(struct device *cpu)
fill_processor_name(processor_name);
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
/* Enable the local CPU APICs */
setup_lapic();
/* Configure C States */
configure_c_states(quad);

4
src/cpu/intel/model_106cx/model_106cx_init.c
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@@ -4,7 +4,6 @@
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/speedstep.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
@@ -67,9 +66,6 @@ static void model_106cx_init(struct device *cpu)
fill_processor_name(processor_name);
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
/* Enable the local CPU APICs */
setup_lapic();
/* Configure C States */
configure_c_states();

2
src/cpu/intel/model_2065x/model_2065x_init.c
View File

@@ -91,9 +91,7 @@ static void model_2065x_init(struct device *cpu)
/* Setup Page Attribute Tables (PAT) */
// TODO set up PAT
/* Enable the local CPU APICs */
enable_lapic_tpr();
setup_lapic();
/* Set virtualization based on Kconfig option */
set_vmx_and_lock();

3
src/cpu/intel/model_206ax/model_206ax_init.c
View File

@@ -7,7 +7,6 @@
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/speedstep.h>
@@ -338,9 +337,7 @@ static void model_206ax_init(struct device *cpu)
/* Setup Page Attribute Tables (PAT) */
// TODO set up PAT
/* Enable the local CPU APICs */
enable_lapic_tpr();
setup_lapic();
/* Set virtualization based on Kconfig option */
set_vmx_and_lock();

4
src/cpu/intel/model_65x/model_65x_init.c
View File

@@ -3,7 +3,6 @@
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/l2_cache.h>
@@ -19,9 +18,6 @@ static void model_65x_init(struct device *dev)
enable_cache();
x86_setup_mtrrs();
x86_mtrr_check();
/* Enable the local CPU APICs */
setup_lapic();
};
static struct device_operations cpu_dev_ops = {

4
src/cpu/intel/model_67x/model_67x_init.c
View File

@@ -3,7 +3,6 @@
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/l2_cache.h>
@@ -22,9 +21,6 @@ static void model_67x_init(struct device *cpu)
/* Setup MTRRs */
x86_setup_mtrrs();
x86_mtrr_check();
/* Enable the local CPU APICs */
setup_lapic();
}
static struct device_operations cpu_dev_ops = {

4
src/cpu/intel/model_68x/model_68x_init.c
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@@ -4,7 +4,6 @@
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
@@ -26,9 +25,6 @@ static void model_68x_init(struct device *cpu)
/* Setup MTRRs */
x86_setup_mtrrs();
x86_mtrr_check();
/* Enable the local CPU APICs */
setup_lapic();
}
static struct device_operations cpu_dev_ops = {

4
src/cpu/intel/model_6bx/model_6bx_init.c
View File

@@ -4,7 +4,6 @@
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
@@ -26,9 +25,6 @@ static void model_6bx_init(struct device *cpu)
/* Setup MTRRs */
x86_setup_mtrrs();
x86_mtrr_check();
/* Enable the local CPU APICs */
setup_lapic();
}
static struct device_operations cpu_dev_ops = {

4
src/cpu/intel/model_6ex/model_6ex_init.c
View File

@@ -4,7 +4,6 @@
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/speedstep.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
@@ -106,9 +105,6 @@ static void model_6ex_init(struct device *cpu)
/* Setup Page Attribute Tables (PAT) */
// TODO set up PAT
/* Enable the local CPU APICs */
setup_lapic();
/* Configure C States */
configure_c_states();

4
src/cpu/intel/model_6fx/model_6fx_init.c
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@@ -4,7 +4,6 @@
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/speedstep.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/name.h>
@@ -120,9 +119,6 @@ static void model_6fx_init(struct device *cpu)
/* Setup Page Attribute Tables (PAT) */
// TODO set up PAT
/* Enable the local CPU APICs */
setup_lapic();
/* Configure C States */
configure_c_states();

4
src/cpu/intel/model_6xx/model_6xx_init.c
View File

@@ -3,7 +3,6 @@
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/cache.h>
@@ -16,9 +15,6 @@ static void model_6xx_init(struct device *dev)
/* Update the microcode */
intel_update_microcode_from_cbfs();
/* Enable the local CPU APICs */
setup_lapic();
};
static struct device_operations cpu_dev_ops = {

4
src/cpu/intel/model_f2x/model_f2x_init.c
View File

@@ -3,7 +3,6 @@
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/intel/common/common.h>
@@ -23,9 +22,6 @@ static void model_f2x_init(struct device *cpu)
intel_update_microcode_from_cbfs();
}
/* Enable the local CPU APICs */
setup_lapic();
/* Start up my CPU siblings */
intel_sibling_init(cpu);
};

4
src/cpu/intel/model_f3x/model_f3x_init.c
View File

@@ -3,7 +3,6 @@
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
#include <cpu/intel/common/common.h>
@@ -23,9 +22,6 @@ static void model_f3x_init(struct device *cpu)
intel_update_microcode_from_cbfs();
}
/* Enable the local CPU APICs */
setup_lapic();
/* Start up my CPU siblings */
if (!CONFIG(PARALLEL_MP))
intel_sibling_init(cpu);

4
src/cpu/intel/model_f4x/model_f4x_init.c
View File

@@ -2,16 +2,12 @@
#include <device/device.h>
#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/cache.h>
static void model_f4x_init(struct device *cpu)
{
/* Turn on caching if we haven't already */
enable_cache();
/* Enable the local CPU APICs */
setup_lapic();
};
static struct device_operations cpu_dev_ops = {