mb/google/asurada: Implement board-specific regulator controls

Currently, five regulator controls are implemented for DRAM
calibration and DVFS feature.

The regulators for VCORE and VM18 are controlled by MT6359.
The reguatlors for VDD1, VDD2 and VMDDR are controlled by MT6360
via EC.

BUG=b:147789962
BRANCH=none
TEST=verified with DRAM driver

Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: Id06a8196ca4badc51b06759afb07b5664278d13b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46406
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>

src/soc/mediatek/common/include/soc/regulator.h

@@ -10,6 +10,7 @@ enum mtk_regulator {
 	MTK_REGULATOR_VDD2,
 	MTK_REGULATOR_VDDQ,
 	MTK_REGULATOR_VMDDR,
+	MTK_REGULATOR_VCORE,
 };
 
 void mainboard_set_regulator_vol(enum mtk_regulator regulator,

src/soc/mediatek/mt8192/include/soc/mt6360.h

@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __SOC_MEDIATEK_MT6360_H__
+#define __SOC_MEDIATEK_MT6360_H__
+
+enum mt6360_regulator_id {
+	MT6360_LDO3 = 0,
+	MT6360_LDO5,
+	MT6360_LDO6,
+	MT6360_LDO7,
+	MT6360_BUCK1,
+	MT6360_BUCK2,
+	MT6360_REGULATOR_COUNT,
+};
+
+#endif /* __SOC_MEDIATEK_MT6360_H__ */