*x86: fix x2apic mode boot issue
Fix booting issues on google/kahlee introduced by CB:51723. Update use inital apic id in smm_stub.S to support xapic mode error. Check more bits(LAPIC_BASE_MSR BIT10 and BIT11) for x2apic mode. TEST=Boot to OS and check apicid, debug log for CPUIDs cpuid_ebx(1), cpuid_ext(0xb, 0), cpuid_edx(0xb) etc Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com> Change-Id: Ia28f60a077182c3753f6ba9fbdd141f951d39b37 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52696 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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committed by
Patrick Georgi
parent
206dfbf173
commit
a04256f55b
@@ -12,7 +12,7 @@ static inline bool is_x2apic_mode(void)
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{
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msr_t msr;
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msr = rdmsr(LAPIC_BASE_MSR);
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return (msr.lo & LAPIC_BASE_MSR_X2APIC_MODE);
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return ((msr.lo & LAPIC_BASE_X2APIC_ENABLED) == LAPIC_BASE_X2APIC_ENABLED);
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}
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static inline void x2apic_send_ipi(uint32_t icrlow, uint32_t apicid)
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@@ -79,8 +79,8 @@ static inline void disable_lapic(void)
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static __always_inline unsigned int initial_lapicid(void)
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{
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uint32_t lapicid;
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if (is_x2apic_mode())
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lapicid = lapic_read(LAPIC_ID);
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if (is_x2apic_mode() && cpuid_get_max_func() >= 0xb)
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lapicid = cpuid_ext(0xb, 0).edx;
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else
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lapicid = cpuid_ebx(1) >> 24;
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return lapicid;
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@@ -5,6 +5,8 @@
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#define LAPIC_BASE_MSR_BOOTSTRAP_PROCESSOR (1 << 8)
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#define LAPIC_BASE_MSR_X2APIC_MODE (1 << 10)
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#define LAPIC_BASE_MSR_ENABLE (1 << 11)
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#define LAPIC_BASE_X2APIC_ENABLED \
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(LAPIC_BASE_MSR_X2APIC_MODE | LAPIC_BASE_MSR_ENABLE)
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#define LAPIC_BASE_MSR_ADDR_MASK 0xFFFFF000
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#ifndef LOCAL_APIC_ADDR
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