broadwell: Flatten acpi_init_gnvs function

Instead of relying on mainboards to call it, do like Lynx Point.

Change-Id: Idb7457e0734e19d0a26f0762079e273b6e740475
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46793
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/broadwell/pch/lpc.c

@@ -13,6 +13,8 @@
 #include <acpi/acpi_gnvs.h>
 #include <cpu/x86/smm.h>
 #include <cbmem.h>
+#include <ec/google/chromeec/ec.h>
+#include <vendorcode/google/chromeos/gnvs.h>
 #include <string.h>
 #include <soc/gpio.h>
 #include <soc/iobp.h>
@@ -621,6 +623,29 @@ static void southcluster_inject_dsdt(const struct device *device)
 
 	if (gnvs) {
 		acpi_create_gnvs(gnvs);
+
+		/* Set unknown wake source */
+		gnvs->pm1i = -1;
+
+		/* CPU core count */
+		gnvs->pcnt = dev_count_cpu();
+
+#if CONFIG(CONSOLE_CBMEM)
+		/* Update the mem console pointer. */
+		gnvs->cbmc = (u32)cbmem_find(CBMEM_ID_CONSOLE);
+#endif
+
+		if (CONFIG(CHROMEOS)) {
+			/* Initialize Verified Boot data */
+			chromeos_init_chromeos_acpi(&(gnvs->chromeos));
+			if (CONFIG(EC_GOOGLE_CHROMEEC)) {
+				gnvs->chromeos.vbt2 = google_ec_running_ro() ?
+					ACTIVE_ECFW_RO : ACTIVE_ECFW_RW;
+			} else {
+				gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO;
+			}
+		}
+
 		/* And tell SMI about it */
 		apm_control(APM_CNT_GNVS_UPDATE);