intel/cpu: rename car.h to romstage.h

This header has nothing to do with cache-as-ram. Therefore, 'car'
is the wrong term to use. It is about providing a prototype for
*romstage*.

Change-Id: Ibc5bc6f3c38e74d6337c12f246846853ceae4743
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/6661
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/mainboard/iei/juki-511p/romstage.c

@@ -32,7 +32,7 @@
 
 #define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1)
 
-#include <cpu/intel/car.h>
+#include <cpu/intel/romstage.h>
 static void main(unsigned long bist)
 {
 	w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

src/mainboard/iei/nova4899r/romstage.c

@@ -32,7 +32,7 @@
 
 #include "northbridge/amd/gx1/raminit.c"
 
-#include <cpu/intel/car.h>
+#include <cpu/intel/romstage.h>
 static void main(unsigned long bist)
 {
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

src/mainboard/iei/pcisa-lx-800-r10/romstage.c

@@ -49,7 +49,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
 #include "cpu/amd/geode_lx/syspreinit.c"
 #include "cpu/amd/geode_lx/msrinit.c"
 
-#include <cpu/intel/car.h>
+#include <cpu/intel/romstage.h>
 void main(unsigned long bist)
 {
 

src/mainboard/iei/pm-lx-800-r11/romstage.c

@@ -53,7 +53,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
 #include <cpu/amd/geode_lx/syspreinit.c>
 #include <cpu/amd/geode_lx/msrinit.c>
 
-#include <cpu/intel/car.h>
+#include <cpu/intel/romstage.h>
 void main(unsigned long bist)
 {
 	static const struct mem_controller memctrl[] = {

src/mainboard/iei/pm-lx2-800-r10/romstage.c

@@ -53,7 +53,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
 #include <cpu/amd/geode_lx/syspreinit.c>
 #include <cpu/amd/geode_lx/msrinit.c>
 
-#include <cpu/intel/car.h>
+#include <cpu/intel/romstage.h>
 void main(unsigned long bist)
 {
 	static const struct mem_controller memctrl[] = {