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Artec Group dbe61 mainboard support.

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Now uses CAR.
New code for SPD-less memory implementation.
Updated IRQ routing.

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2728 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Marc Jones
2007-06-20 23:45:44 +00:00
parent dfb3c130d5
commit a0aaa752dd
8 changed files with 458 additions and 279 deletions
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17
targets/artecgroup/dbe61/Config.lb
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@@ -3,14 +3,21 @@
target dbe61
mainboard artecgroup/dbe61
# HACK to get the right TSC support.
option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0
option CONFIG_COMPRESSED_PAYLOAD_LZMA=0
## ROM_SIZE is the total number of bytes allocated for LinuxBIOS use
## (normal AND fallback images and payloads).
## leave 64k for vsa and 32K for video ROM
option ROM_SIZE = 1024*256 - 64*1024 - 32 * 1024
## leave 36k for vsa and 32K for video ROM
#option ROM_SIZE = 1024*256 - 36*1024 - 32 * 1024
## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a LinuxBIOS image,
#No VGA for now
option ROM_SIZE = 1024*512 - 36*1024
# ROM_IMAGE_SIZE is the maximum number of bytes allowed for a LinuxBIOS image,
## not including any payload.
option ROM_IMAGE_SIZE=64*1024
@@ -21,7 +28,7 @@ option MAXIMUM_CONSOLE_LOGLEVEL = 11
romimage "fallback"
option USE_FALLBACK_IMAGE=1
option LINUXBIOS_EXTRA_VERSION=".0Fallback"
payload /tmp/filo.elf
payload ../payload.elf
end
buildrom ./linuxbios.rom ROM_SIZE "fallback"
buildrom ./dbe61.rom ROM_SIZE "fallback"