intel/skylake: Fix issues found by klockwork
src/soc/intel/skylake/acpi.c Function cbmem_find may return NULL, check before using its result. src/soc/intel/skylake/flash_controller.c Remove dead code: spi_claim_bus is a no-op, always returning 0. src/soc/intel/skylake/gpio.c Check for NULL before using pointers. src/soc/intel/skylake/igd.c Don't copy 0-termination of signature string. src/soc/intel/skylake/lpc.c Don't check unsigned >= 0. src/soc/intel/skylake/systemagent.c Explicitly cast result to 64bit. BRANCH=None BUG=chrome-os-partner:48542 TEST=Built & booted Kunimitsu board. Change-Id: I6cbf4f78382383d3c8c3b15f66c5898ab5bf183a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d98a8cdd3d095a6943c0e104cd4938639a62bd14 Original-Change-Id: Id2a31402618f4c9f6f53525ebcf6b71fd67428db Original-Signed-off-by: Naresh G Solanki <Naresh.Solanki@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/317522 Original-Commit-Ready: Naresh Solanki <naresh.solanki@intel.com> Original-Tested-by: Naresh Solanki <naresh.solanki@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12991 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
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			| @@ -573,11 +573,15 @@ void southcluster_inject_dsdt(device_t device) | |||||||
| /* Save wake source information for calculating ACPI _SWS values */ | /* Save wake source information for calculating ACPI _SWS values */ | ||||||
| int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) | int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) | ||||||
| { | { | ||||||
| 	struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE); | 	struct chipset_power_state *ps; | ||||||
| 	static uint32_t gpe0_sts[GPE0_REG_MAX]; | 	static uint32_t gpe0_sts[GPE0_REG_MAX]; | ||||||
| 	uint32_t pm1_en; | 	uint32_t pm1_en; | ||||||
| 	int i; | 	int i; | ||||||
|  |  | ||||||
|  | 	ps = cbmem_find(CBMEM_ID_POWER_STATE); | ||||||
|  | 	if (ps == NULL) | ||||||
|  | 		return -1; | ||||||
|  |  | ||||||
| 	/* PM1_EN state is lost in Deep S3 so enable basic wake events */ | 	/* PM1_EN state is lost in Deep S3 so enable basic wake events */ | ||||||
| 	pm1_en = ps->pm1_en | PCIEXPWAK_STS | RTC_STS | PWRBTN_STS | BM_STS; | 	pm1_en = ps->pm1_en | PCIEXPWAK_STS | RTC_STS | PWRBTN_STS | BM_STS; | ||||||
| 	*pm1 = ps->pm1_sts & pm1_en; | 	*pm1 = ps->pm1_sts & pm1_en; | ||||||
|   | |||||||
| @@ -191,11 +191,6 @@ int pch_hwseq_erase(struct spi_flash *flash, u32 offset, size_t len) | |||||||
| 	} | 	} | ||||||
|  |  | ||||||
| 	flash->spi->rw = SPI_WRITE_FLAG; | 	flash->spi->rw = SPI_WRITE_FLAG; | ||||||
| 	ret = spi_claim_bus(flash->spi); |  | ||||||
| 	if (ret) { |  | ||||||
| 		printk(BIOS_ERR, "SF: Unable to claim SPI bus\n"); |  | ||||||
| 		return ret; |  | ||||||
| 	} |  | ||||||
|  |  | ||||||
| 	start = offset; | 	start = offset; | ||||||
| 	end = start + len; | 	end = start + len; | ||||||
|   | |||||||
| @@ -261,6 +261,9 @@ static void gpio_handle_pad_mode(const struct pad_config *cfg) | |||||||
| 	bit = 0; | 	bit = 0; | ||||||
| 	hostsw_own_reg = gpio_hostsw_reg(cfg->pad, &bit); | 	hostsw_own_reg = gpio_hostsw_reg(cfg->pad, &bit); | ||||||
|  |  | ||||||
|  | 	if (hostsw_own_reg == NULL) | ||||||
|  | 		return; | ||||||
|  |  | ||||||
| 	reg = read32(hostsw_own_reg); | 	reg = read32(hostsw_own_reg); | ||||||
| 	reg &= ~(1U << bit); | 	reg &= ~(1U << bit); | ||||||
|  |  | ||||||
| @@ -282,7 +285,8 @@ static void gpi_enable_smi(gpio_t pad) | |||||||
| 	uint32_t pad_mask; | 	uint32_t pad_mask; | ||||||
|  |  | ||||||
| 	comm = gpio_get_community(pad); | 	comm = gpio_get_community(pad); | ||||||
|  | 	if (comm == NULL) | ||||||
|  | 		return; | ||||||
| 	regs = pcr_port_regs(comm->port_id); | 	regs = pcr_port_regs(comm->port_id); | ||||||
| 	gpi_status_reg = (void *)®s[GPI_SMI_STS_OFFSET]; | 	gpi_status_reg = (void *)®s[GPI_SMI_STS_OFFSET]; | ||||||
| 	gpi_en_reg = (void *)®s[GPI_SMI_EN_OFFSET]; | 	gpi_en_reg = (void *)®s[GPI_SMI_EN_OFFSET]; | ||||||
|   | |||||||
| @@ -118,7 +118,7 @@ static int init_igd_opregion(igd_opregion_t *opregion) | |||||||
| 		die("vbt data not found"); | 		die("vbt data not found"); | ||||||
|  |  | ||||||
| 	memcpy(&opregion->header.signature, IGD_OPREGION_SIGNATURE, | 	memcpy(&opregion->header.signature, IGD_OPREGION_SIGNATURE, | ||||||
| 		sizeof(IGD_OPREGION_SIGNATURE)); | 		sizeof(IGD_OPREGION_SIGNATURE) - 1); | ||||||
| 	memcpy(opregion->header.vbios_version, vbt->coreblock_biosbuild, sizeof(u32)); | 	memcpy(opregion->header.vbios_version, vbt->coreblock_biosbuild, sizeof(u32)); | ||||||
| 	memcpy(opregion->vbt.gvd1, vbt, vbt->hdr_vbt_size < | 	memcpy(opregion->vbt.gvd1, vbt, vbt->hdr_vbt_size < | ||||||
| 		sizeof(opregion->vbt.gvd1) ? vbt->hdr_vbt_size : | 		sizeof(opregion->vbt.gvd1) ? vbt->hdr_vbt_size : | ||||||
|   | |||||||
| @@ -209,9 +209,12 @@ static inline int pch_io_range_in_default(u16 base, u16 size) | |||||||
| 	if (base >= LPC_DEFAULT_IO_RANGE_UPPER) | 	if (base >= LPC_DEFAULT_IO_RANGE_UPPER) | ||||||
| 		return 0; | 		return 0; | ||||||
|  |  | ||||||
| 	/* Is it entirely contained? */ | 	/* | ||||||
| 	if (base >= LPC_DEFAULT_IO_RANGE_LOWER && | 	 * Is it entirely contained? | ||||||
| 	    (base + size) < LPC_DEFAULT_IO_RANGE_UPPER) | 	 * Since LPC_DEFAULT_IO_RANGE_LOWER is Zero, | ||||||
|  | 	 * it need not be checked against lower base. | ||||||
|  | 	 */ | ||||||
|  | 	if ((base + size) < LPC_DEFAULT_IO_RANGE_UPPER) | ||||||
| 		return 1; | 		return 1; | ||||||
|  |  | ||||||
| 	/* This will return not in range for partial overlaps. */ | 	/* This will return not in range for partial overlaps. */ | ||||||
|   | |||||||
| @@ -183,7 +183,7 @@ static void read_map_entry(device_t dev, struct map_entry *entry, | |||||||
| 		value <<= 32; | 		value <<= 32; | ||||||
| 	} | 	} | ||||||
|  |  | ||||||
| 	value |= pci_read_config32(dev, entry->reg); | 	value |= (uint64_t) pci_read_config32(dev, entry->reg); | ||||||
| 	value &= mask; | 	value &= mask; | ||||||
|  |  | ||||||
| 	if (entry->is_limit) | 	if (entry->is_limit) | ||||||
|   | |||||||
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