sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

skylake: Use common ACPI _SWS code

Browse Source 
Enable and use the common code for filling out the NVS data used
by the _SWS methods.  Add a function to provide the wake source
data.  With Deep S3 enabled skylake does not retain the contents
of the PM1_EN register so instead just select the wake related
events in PM1_STS.

BUG=chrome-os-partner:40635
BRANCH=none
TEST=tested on glados by checking for valid _SWS string in
/sys/firmware/log after suspend/resume.  Wake sources that were
tested are RTC, power button, keypress, trackpad, and wifi.

Change-Id: I93a4f740f2e2ef1c34e948db1d8e273332296921
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: cb4d4705b87ef7169f1979009c34a58de93c4ef0
Original-Change-Id: Ib6b4df09ea3090894f09290d00dcdc5aebc3eabb
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/298169
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11648
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Duncan Laurie
2015-09-08 16:12:44 -07:00
committed by Patrick Georgi
parent 47a0b8494b
commit a1c8b34d7b
3 changed files with 25 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/soc/intel/skylake/Kconfig
View File

@@ -37,6 +37,7 @@ config CPU_SPECIFIC_OPTIONS
select RELOCATABLE_MODULES
select RELOCATABLE_RAMSTAGE
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_FSP_RAM_INIT
select SOC_INTEL_COMMON_FSP_ROMSTAGE
select SOC_INTEL_COMMON_RESET