soc/intel/{tgl,jsl}: Use soc/intel/jasperlake for Jasper Lake SoC

Switch to using Jasper Lake SoC code from soc/intel/jasperlake and stop
referring from soc/intel/tigerlake.
Addtionally mainboard changes are done to support build.

BUG=b:150217037
TEST=Build and boot waddledoo. Build jasperlake_rvp  and volteer board.

Change-Id: I39f117bd66cb610a305bcdb8ea65332fd0ff4814
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

src/mainboard/intel/jasperlake_rvp/dsdt.asl

@@ -25,7 +25,7 @@ DefinitionBlock(
 	0x20110725	/* OEM revision */
 )
 {
-	#include <soc/intel/tigerlake/acpi/platform.asl>
+	#include <soc/intel/jasperlake/acpi/platform.asl>
 
 	/* global NVS and variables */
 	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
@@ -37,7 +37,7 @@ DefinitionBlock(
 		Device (PCI0)
 		{
 			#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
-			#include <soc/intel/tigerlake/acpi/southbridge.asl>
+			#include <soc/intel/jasperlake/acpi/southbridge.asl>
 		}
 	}
 

src/mainboard/intel/jasperlake_rvp/romstage_fsp_params.c

@@ -14,7 +14,7 @@
  */
 #include <baseboard/variants.h>
 #include <console/console.h>
-#include <soc/meminit_jsl.h>
+#include <soc/meminit.h>
 #include <soc/romstage.h>
 #include "board_id.h"
 

src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h

@@ -17,7 +17,7 @@
 #define __BASEBOARD_VARIANTS_H__
 
 #include <soc/gpio.h>
-#include <soc/meminit_jsl.h>
+#include <soc/meminit.h>
 #include <stdint.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 

src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb

@@ -1,4 +1,4 @@
-chip soc/intel/tigerlake
+chip soc/intel/jasperlake
 
 	device cpu_cluster 0 on
 		device lapic 0 on end

src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory.c

@@ -16,7 +16,7 @@
 #include <baseboard/variants.h>
 #include <baseboard/gpio.h>
 #include <gpio.h>
-#include <soc/meminit_jsl.h>
+#include <soc/meminit.h>
 #include <soc/romstage.h>
 
 static const struct mb_cfg jslrvp_ddr4_memcfg_cfg = {