From a2bbbc6769c4495fe865228adbb006ff1d8634cd Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Fri, 10 Mar 2023 13:28:53 -0700 Subject: [PATCH] mb/system76/tgl-u: Enable reporting CPU C10 state over ESPI Change-Id: Ia811187df194af596eeea7d4fd7be0de5fa9254c --- src/mainboard/system76/tgl-u/variants/darp7/ramstage.c | 3 +++ src/mainboard/system76/tgl-u/variants/galp5/ramstage.c | 3 +++ src/mainboard/system76/tgl-u/variants/lemp10/ramstage.c | 3 +++ 3 files changed, 9 insertions(+) diff --git a/src/mainboard/system76/tgl-u/variants/darp7/ramstage.c b/src/mainboard/system76/tgl-u/variants/darp7/ramstage.c index a60587d5d4..568eb1242a 100644 --- a/src/mainboard/system76/tgl-u/variants/darp7/ramstage.c +++ b/src/mainboard/system76/tgl-u/variants/darp7/ramstage.c @@ -12,4 +12,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params) // IOM config params->PchUsbOverCurrentEnable = 0; params->PortResetMessageEnable[5] = 1; // J_TYPEC2 + + // Enable reporting CPU C10 state over ESPI + params->PchEspiHostC10ReportEnable = 1; } diff --git a/src/mainboard/system76/tgl-u/variants/galp5/ramstage.c b/src/mainboard/system76/tgl-u/variants/galp5/ramstage.c index a60587d5d4..568eb1242a 100644 --- a/src/mainboard/system76/tgl-u/variants/galp5/ramstage.c +++ b/src/mainboard/system76/tgl-u/variants/galp5/ramstage.c @@ -12,4 +12,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params) // IOM config params->PchUsbOverCurrentEnable = 0; params->PortResetMessageEnable[5] = 1; // J_TYPEC2 + + // Enable reporting CPU C10 state over ESPI + params->PchEspiHostC10ReportEnable = 1; } diff --git a/src/mainboard/system76/tgl-u/variants/lemp10/ramstage.c b/src/mainboard/system76/tgl-u/variants/lemp10/ramstage.c index 2064836977..afafe09eb3 100644 --- a/src/mainboard/system76/tgl-u/variants/lemp10/ramstage.c +++ b/src/mainboard/system76/tgl-u/variants/lemp10/ramstage.c @@ -12,4 +12,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params) // IOM config params->PchUsbOverCurrentEnable = 0; params->PortResetMessageEnable[2] = 1; // J_TYPEC1 + + // Enable reporting CPU C10 state over ESPI + params->PchEspiHostC10ReportEnable = 1; }