amdfam10 boards: Add Makefiles and fix resourcemap.c

Also remove global ramstage-y += get_bus_conf.c, this is
specific to amdfam10.

Change-Id: I49b604ebff6bcfe85518b2c3896ab798c3c7878d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30629
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/arch/x86/Makefile.inc

@@ -378,9 +378,6 @@ ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/smihandler.c),)
 smm-srcs += src/mainboard/$(MAINBOARDDIR)/smihandler.c
 endif
 endif
-ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c),)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
-endif
 
 ramstage-libs ?=
 

src/mainboard/advansus/a785e-i/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/advansus/a785e-i/resourcemap.c

@@ -13,7 +13,11 @@
  * GNU General Public License for more details.
  */
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/advansus/a785e-i/romstage.c

@@ -46,7 +46,6 @@
 #include <arch/early_variables.h>
 #include <cbmem.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 #include "spd.h"
 

src/mainboard/amd/bimini_fam10/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/amd/bimini_fam10/resourcemap.c

@@ -13,7 +13,11 @@
  * GNU General Public License for more details.
  */
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/amd/bimini_fam10/romstage.c

@@ -45,7 +45,6 @@
 #include "southbridge/amd/sb800/early_setup.c"
 #include <spd.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 void activate_spd_rom(const struct mem_controller *ctrl);

src/mainboard/amd/mahogany_fam10/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/amd/mahogany_fam10/resourcemap.c

@@ -15,7 +15,11 @@
 
 
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/amd/mahogany_fam10/romstage.c

@@ -51,7 +51,6 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 void activate_spd_rom(const struct mem_controller *ctrl);

src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc

@@ -2,3 +2,7 @@ $(eval $(call asl_template,ssdt2))
 $(eval $(call asl_template,ssdt3))
 $(eval $(call asl_template,ssdt4))
 $(eval $(call asl_template,ssdt5))
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c

@@ -13,7 +13,11 @@
  * GNU General Public License for more details.
  */
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/amd/serengeti_cheetah_fam10/romstage.c

@@ -44,7 +44,6 @@
 #include "southbridge/amd/amd8111/early_smbus.c"
 #include "southbridge/amd/amd8111/early_ctrl.c"
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)

src/mainboard/amd/tilapia_fam10/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/amd/tilapia_fam10/resourcemap.c

@@ -13,7 +13,11 @@
  * GNU General Public License for more details.
  */
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/amd/tilapia_fam10/romstage.c

@@ -47,7 +47,6 @@
 #include <spd.h>
 #include <southbridge/amd/rs780/rs780.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)

src/mainboard/asus/kcma-d8/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/asus/kcma-d8/resourcemap.c

@@ -17,9 +17,11 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/cpu.h>
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
 
-static void setup_mb_resource_map(void)
+void setup_mb_resource_map(void)
 {
 	static const unsigned int fam15h_register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/asus/kcma-d8/romstage.c

@@ -46,7 +46,6 @@
 #include <arch/early_variables.h>
 #include <cbmem.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_0_DEV PNP_DEV(0x2e, W83667HG_A_SP1)

src/mainboard/asus/kfsn4-dre/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/asus/kfsn4-dre/resourcemap.c

@@ -17,7 +17,11 @@
  * GNU General Public License for more details.
  */
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/asus/kfsn4-dre/romstage.c

@@ -45,7 +45,6 @@
 #include <northbridge/amd/amdfam10/raminit.h>
 #include <cpu/amd/family_10h-family_15h/init_cpus.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)

src/mainboard/asus/kgpe-d16/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/asus/kgpe-d16/resourcemap.c

@@ -17,9 +17,11 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/cpu.h>
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
 
-static void setup_mb_resource_map(void)
+void setup_mb_resource_map(void)
 {
 	static const unsigned int fam15h_register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/asus/kgpe-d16/romstage.c

@@ -46,7 +46,6 @@
 #include <arch/early_variables.h>
 #include <cbmem.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_0_DEV PNP_DEV(0x2e, W83667HG_A_SP1)

src/mainboard/asus/m4a78-em/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/asus/m4a78-em/resourcemap.c

@@ -15,7 +15,11 @@
 
 
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/asus/m4a78-em/romstage.c

@@ -48,7 +48,6 @@
 #include <spd.h>
 #include <southbridge/amd/rs780/rs780.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)

src/mainboard/asus/m4a785-m/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/asus/m4a785-m/resourcemap.c

@@ -15,7 +15,11 @@
 
 
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/asus/m4a785-m/romstage.c

@@ -49,7 +49,6 @@
 #include <spd.h>
 #include <southbridge/amd/rs780/rs780.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)

src/mainboard/asus/m4a785t-m/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += ../m4a785-m/resourcemap.c
+
+ramstage-y += ../m4a785-m/get_bus_conf.c

src/mainboard/asus/m5a88-v/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/asus/m5a88-v/resourcemap.c

@@ -13,7 +13,11 @@
  * GNU General Public License for more details.
  */
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/asus/m5a88-v/romstage.c

@@ -48,7 +48,6 @@
 #include "southbridge/amd/sb800/early_setup.c"
 #include "spd.h"
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x4e, IT8721F_SP1)

src/mainboard/avalue/eax-785e/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/avalue/eax-785e/resourcemap.c

@@ -13,7 +13,11 @@
  * GNU General Public License for more details.
  */
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/avalue/eax-785e/romstage.c

@@ -46,7 +46,6 @@
 #include <southbridge/amd/rs780/rs780.h>
 #include <southbridge/amd/sb800/early_setup.c>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)

src/mainboard/gigabyte/ma785gm/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/gigabyte/ma785gm/resourcemap.c

@@ -15,7 +15,11 @@
 
 
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/gigabyte/ma785gm/romstage.c

@@ -45,7 +45,6 @@
 #include <spd.h>
 #include <southbridge/amd/rs780/rs780.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)

src/mainboard/gigabyte/ma785gmt/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/gigabyte/ma785gmt/resourcemap.c

@@ -15,7 +15,11 @@
 
 
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/gigabyte/ma785gmt/romstage.c

@@ -45,7 +45,6 @@
 #include <spd.h>
 #include <southbridge/amd/rs780/rs780.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)

src/mainboard/gigabyte/ma78gm/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/gigabyte/ma78gm/resourcemap.c

@@ -15,7 +15,11 @@
 
 
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/gigabyte/ma78gm/romstage.c

@@ -48,7 +48,6 @@
 #include <cbmem.h>
 #include <southbridge/amd/rs780/rs780.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)

src/mainboard/hp/dl165_g6_fam10/Makefile.inc

@@ -0,0 +1,14 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+ramstage-y += get_bus_conf.c

src/mainboard/iei/kino-780am2-fam10/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/iei/kino-780am2-fam10/resourcemap.c

@@ -15,7 +15,11 @@
 
 
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/iei/kino-780am2-fam10/romstage.c

@@ -48,7 +48,6 @@
 #include <cbmem.h>
 #include <southbridge/amd/rs780/rs780.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, F71859_SP1)

src/mainboard/jetway/pa78vm5/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/jetway/pa78vm5/resourcemap.c

@@ -16,7 +16,11 @@
 
 
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/jetway/pa78vm5/romstage.c

@@ -49,7 +49,6 @@
 #include <cbmem.h>
 #include <southbridge/amd/rs780/rs780.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #if CONFIG_TTYS0_BASE == 0x2f8

src/mainboard/msi/ms9652_fam10/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/msi/ms9652_fam10/resourcemap.c

@@ -15,7 +15,11 @@
  * GNU General Public License for more details.
  */
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/msi/ms9652_fam10/romstage.c

@@ -44,7 +44,6 @@
 #include <southbridge/amd/common/reset.h>
 #include <southbridge/nvidia/mcp55/mcp55.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)

src/mainboard/supermicro/h8dmr_fam10/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/supermicro/h8dmr_fam10/resourcemap.c

@@ -15,7 +15,11 @@
  * GNU General Public License for more details.
  */
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/supermicro/h8dmr_fam10/romstage.c

@@ -45,7 +45,6 @@
 
 #include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 #include <southbridge/nvidia/mcp55/early_setup_ss.h>
 #include "southbridge/nvidia/mcp55/early_setup_car.c"

src/mainboard/supermicro/h8qme_fam10/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/supermicro/h8qme_fam10/resourcemap.c

@@ -15,7 +15,11 @@
  * GNU General Public License for more details.
  */
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/supermicro/h8qme_fam10/romstage.c

@@ -44,7 +44,6 @@
 #include <cbmem.h>
 #include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 #include <southbridge/nvidia/mcp55/early_setup_ss.h>
 #include "southbridge/nvidia/mcp55/early_setup_car.c"

src/mainboard/supermicro/h8scm_fam10/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/supermicro/h8scm_fam10/resourcemap.c

@@ -15,7 +15,11 @@
 
 
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/supermicro/h8scm_fam10/romstage.c

@@ -47,7 +47,6 @@
 #include <arch/early_variables.h>
 #include <cbmem.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 void activate_spd_rom(const struct mem_controller *ctrl);

src/mainboard/tyan/s2912_fam10/Makefile.inc

@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c

src/mainboard/tyan/s2912_fam10/resourcemap.c

@@ -15,7 +15,11 @@
  * GNU General Public License for more details.
  */
 
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
 {
 	static const unsigned int register_values[] = {
 		/* Careful set limit registers before base registers which contain the enables */

src/mainboard/tyan/s2912_fam10/romstage.c

@@ -44,7 +44,6 @@
 #include <cbmem.h>
 #include <southbridge/nvidia/mcp55/mcp55.h>
 
-#include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)

src/northbridge/amd/amdfam10/amdfam10.h

@@ -1000,6 +1000,7 @@ void setup_resource_map_x_offset(const u32 *register_values, u32 max, u32
 
 void setup_resource_map_x(const u32 *register_values, u32 max);
 void setup_resource_map(const u32 *register_values, u32 max);
+void setup_mb_resource_map(void);
 
 /* reset_test.c */
 u32 cpu_init_detected(u8 nodeid);