src: Remove unneeded whitespace
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29161 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
committed by
Patrick Georgi
parent
9856892297
commit
a342f3937e
@@ -682,7 +682,7 @@ static void waitCurrentPstate(u32 target_pstate) {
|
||||
|
||||
do { // should we just go on instead ?
|
||||
pstate_msr = rdmsr(PS_STS_REG);
|
||||
} while ( pstate_msr.lo != target_pstate );
|
||||
} while (pstate_msr.lo != target_pstate);
|
||||
}
|
||||
}
|
||||
|
||||
|
@@ -226,7 +226,7 @@ void amd_generate_powernow(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
|
||||
fam10h_rev_e = 1;
|
||||
|
||||
/*
|
||||
* Based on the CPU socket type,cmp_cap and pwr_lmt , get the power limit.
|
||||
* Based on the CPU socket type, cmp_cap and pwr_lmt, get the power limit.
|
||||
* socket_type : 0x10 SocketF; 0x11 AM2/ASB1; 0x12 S1G1
|
||||
* cmp_cap : 0x0 SingleCore; 0x1 DualCore; 0x2 TripleCore; 0x3 QuadCore; 0x4 QuintupleCore; 0x5 HexCore
|
||||
*/
|
||||
|
@@ -129,7 +129,7 @@ static void apply_microcode_patch(const struct microcode *m)
|
||||
msr = rdmsr(0x8b);
|
||||
new_patch_id = msr.lo;
|
||||
|
||||
UCODE_DEBUG("updated to patch id = 0x%08x %s\n", new_patch_id ,
|
||||
UCODE_DEBUG("updated to patch id = 0x%08x %s\n", new_patch_id,
|
||||
(new_patch_id == m->patch_id) ? "success" : "fail");
|
||||
}
|
||||
|
||||
|
Reference in New Issue
Block a user