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intel/fsp1_0: Allow the MRC cache to live in a FMAP region

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The new option CONFIG_MRC_CACHE_FMAP will cause fastboot_cache.c to
look in the FMAP for a region named "RW_MRC_CACHE" and prevents adding
a CBFS file named "mrc.cache".

Tested on a fsp_baytail-based board.

Change-Id: I248f469c7e3447ac4ec7be32229fbb5584cfd2ed
Signed-off-by: Ben Gardner <gardner.ben@gmail.com>
Reviewed-on: https://review.coreboot.org/13632
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: York Yang <york.yang@intel.com>
This commit is contained in:
Ben Gardner 2016-02-08 12:18:09 -06:00 committed by Martin Roth
parent b19425b46b
commit a3e4833e5d
3 changed files with 25 additions and 2 deletions
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9
src/drivers/intel/fsp1_0/Kconfig
View File

@ -68,10 +68,19 @@ config ENABLE_MRC_CACHE
This can either be used for fast boot, or just because the FSP wants This can either be used for fast boot, or just because the FSP wants
it to be saved. it to be saved.
config MRC_CACHE_FMAP
bool "Use MRC Cache in FMAP"
depends on ENABLE_MRC_CACHE
default n
help
Use the region "RW_MRC_CACHE" in FMAP instead of "mrc.cache" in CBFS.
You must define a region in your FMAP named "RW_MRC_CACHE".
config MRC_CACHE_SIZE config MRC_CACHE_SIZE
hex "Fast Boot Data Cache Size" hex "Fast Boot Data Cache Size"
default 0x10000 default 0x10000
depends on ENABLE_MRC_CACHE depends on ENABLE_MRC_CACHE
depends on !MRC_CACHE_FMAP
help help
This is the amount of space in NV storage that is reserved for the This is the amount of space in NV storage that is reserved for the
fast boot data cache storage. fast boot data cache storage.

2
src/drivers/intel/fsp1_0/Makefile.inc
View File

@ -31,6 +31,7 @@ fsp.bin-type := fsp
endif endif
ifeq ($(CONFIG_ENABLE_MRC_CACHE),y) ifeq ($(CONFIG_ENABLE_MRC_CACHE),y)
ifneq ($(CONFIG_MRC_CACHE_FMAP),y)
$(obj)/mrc.cache: $(obj)/mrc.cache:
dd if=/dev/zero count=1 \ dd if=/dev/zero count=1 \
bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \ bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \
@ -41,4 +42,5 @@ mrc.cache-file := $(obj)/mrc.cache
mrc.cache-align := 0x10000 mrc.cache-align := 0x10000
mrc.cache-type := mrc_cache mrc.cache-type := mrc_cache
endif endif
endif

16
src/drivers/intel/fsp1_0/fastboot_cache.c
View File

@ -19,6 +19,7 @@
#include <bootstate.h> #include <bootstate.h>
#include <console/console.h> #include <console/console.h>
#include <cbfs.h> #include <cbfs.h>
#include <fmap.h>
#include <ip_checksum.h> #include <ip_checksum.h>
#include <device/device.h> #include <device/device.h>
#include <cbmem.h> #include <cbmem.h>
@ -55,11 +56,22 @@ static int is_mrc_cache(struct mrc_data_container *mrc_cache)
static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr) static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
{ {
size_t region_size; size_t region_size;
*mrc_region_ptr = cbfs_boot_map_with_leak("mrc.cache",
if (IS_ENABLED(CONFIG_MRC_CACHE_FMAP)) {
struct region_device rdev;
if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev) == 0) {
*mrc_region_ptr = rdev_mmap_full(&rdev);
return region_device_sz(&rdev);
}
*mrc_region_ptr = NULL;
return 0;
} else {
*mrc_region_ptr = cbfs_boot_map_with_leak("mrc.cache",
CBFS_TYPE_MRC_CACHE, CBFS_TYPE_MRC_CACHE,
&region_size); &region_size);
return region_size; return region_size;
}
} }
/* /*