mt8173: add SPI NOR support
BRANCH=none BUG=none TEST=boot oak to kernel on rev1 Change-Id: I0773c81398df445aec16bcfcd0c5a8fe5a588b5c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ae15c42c2f7d9c2a716e5b6098d85e17279f5eae Original-Change-Id: I65abf810d35ae5e7156cf6f5730117e690183d18 Original-Signed-off-by: mtk05962 <bayi.cheng@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/292693 Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/13102 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@@ -23,6 +23,7 @@
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#include <string.h>
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#include <timer.h>
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#include <soc/addressmap.h>
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#include <soc/flash_controller.h>
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#include <soc/gpio.h>
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#include <soc/pinmux.h>
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#include <soc/pll.h>
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@@ -161,6 +162,7 @@ static void mtk_spi_dump_data(const char *name, const uint8_t *data,
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
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{
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struct mtk_spi_bus *eslave;
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static struct spi_slave slave;
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switch (bus) {
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case CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS:
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@@ -168,6 +170,12 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
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assert(read32(&eslave->regs->spi_cfg0_reg) != 0);
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spi_sw_reset(eslave->regs);
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return &eslave->slave;
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case CONFIG_BOOT_MEDIA_SPI_BUS:
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slave.bus = bus;
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slave.cs = cs;
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slave.force_programmer_specific = 1;
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slave.programmer_specific_probe = &mt8173_nor_flash_probe;
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return &slave;
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default:
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die ("wrong bus number.\n");
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};
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